k8temp-0.4.0/Makefile0000644000000000000000000000075511027545555014545 0ustar00usergroup00000000000000 PREFIX?= /usr/local UNAME?= /usr/bin/uname .if !defined(OPSYS) OPSYS!= ${UNAME} -s .endif WARNS= 6 CSTD= gnu99 BINDIR=${PREFIX}/sbin MAN= k8temp.8 PROG= k8temp SRCS= k8temp.c k8temp.h k8temp_pci.h .if ${OPSYS} == "NetBSD" || defined(WITH_LIBPCI) SRCS+= k8temp_libpci.c k8temp_libpci.h CFLAGS+= -DWITH_LIBPCI .else SRCS+= k8temp_devpci.c k8temp_devpci.h . if ${OPSYS} == "OpenBSD" || defined(WITHOUT_PCIOCGETCONF) CFLAGS+= -DWITHOUT_PCIOCGETCONF . endif .endif .include "bsd.prog.mk" k8temp-0.4.0/README0000644000000000000000000000601311027545555013756 0ustar00usergroup00000000000000k8temp - AMD K8 thermal diode reader ==================================== Synopsis -------- k8temp displays readings from the on-die thermal diodes found in most AMD K8 processors, including Athlon 64's and Opterons. As of 0.4.0, k8temp can also produce values from AMD K10's, including Barcelona and Phenom. This support is experimental, and is unlikely to report realistic values at this time. ======= WARNING ======= Since this pokes at PCI registers, it has the potential to make your system crash, reboot, catch fire, and frame you for conspiracy to murder heads of state. k8temp has caused at least one of these things to happen during development. Installation ------------ If you're on FreeBSD, consider using the port at sysutils/k8temp. Otherwise, just: make make install The Makefile should detect any flags your OS needs. If you want to try it on a system without bsd.prog.mk: cc -o k8temp k8temp.c k8temp_devpci.c OpenBSD users (who have USER_PCI configured kernels) may want: cc -DWITHOUT_PCIOCGETCONF -o k8temp k8temp.c k8temp_devpci.c NetBSD users can try: cc -DWITH_LIBPCI -o k8temp k8temp.c k8temp_libpci.c But note this has only been build tested (on FreeBSD and NetBSD/Sparc...) DragonFlyBSD should Just Work(tm), since it has an identical /dev/pci API to FreeBSD. Let me know if you get it working on systems other than FreeBSD 6 or 7. Examples -------- -% sudo k8temp CPU 0 Core 0 Sensor 0: 35c CPU 0 Core 1 Sensor 0: 36c CPU 1 Core 0 Sensor 0: 33c CPU 1 Core 1 Sensor 0: 32c -% sudo k8temp -n 0:0:0 1:0:0 35 33 -% sudo k8temp -d CPUID: Vendor: AuthenticAMD, Id=0x20f12 Model=1 Family=15 Stepping=2 Advanced Power Management=0xf Temperature sensor: Yes Frequency ID control: Yes Voltage ID control: Yes THERMTRIP support: Yes HW Thermal control: No SW Thermal control: No 100MHz multipliers: No HW P-State control: No TSC Invariant: No Thermtrip=0x0d540524 (CurTmp=0x54 (35c) TjOffset=0x0d DiodeOffset=0x05 (6c)) CPU 0 Core 0 Sensor 0: 35c Thermtrip=0x0d560520 (CurTmp=0x56 (37c) TjOffset=0x0d DiodeOffset=0x05 (6c)) CPU 0 Core 1 Sensor 0: 37c Thermtrip=0x0f530224 (CurTmp=0x53 (34c) TjOffset=0x0f DiodeOffset=0x02 (9c)) CPU 1 Core 0 Sensor 0: 34c Thermtrip=0x0f520220 (CurTmp=0x52 (33c) TjOffset=0x0f DiodeOffset=0x02 (9c)) CPU 1 Core 1 Sensor 0: 33c Yes, some AMD64's allegedly have two sensors per core. References ---------- BIOS and Kernel Developer's Guide for AMD NPT Family 0fh Processors. Section 4.6.23, Thermtrip Status Register. http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/32559.pdf BIOS and Kernel Developer's Guide (BKDG) For AMD Family 10h Processors Section 3.6.F3xA4, Reported Temperature Control Register. http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/31116.pdf AMD CPUID Specification, revision 2.26. http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/25481.pdf Linux kernel, drivers/hwmon/k8temp.c Blame ----- k8temp was written by Thomas Hurst WWW: http://hur.st/k8temp/ k8temp-0.4.0/k8temp.80000644000000000000000000000702711027545555014405 0ustar00usergroup00000000000000.\" Copyright (c) 2007-2008 Thomas Hurst .\" .\" Permission is hereby granted, free of charge, to any person obtaining a copy .\" of this software and associated documentation files (the "Software"), to deal .\" in the Software without restriction, including without limitation the rights .\" to use, copy, modify, merge, publish, distribute, sublicense, and/or sell .\" copies of the Software, and to permit persons to whom the Software is .\" furnished to do so, subject to the following conditions: .\" .\" The above copyright notice and this permission notice shall be included in .\" all copies or substantial portions of the Software. .\" .\" THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR .\" IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, .\" FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE .\" AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER .\" LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, .\" OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN .\" THE SOFTWARE. .\" .Dd October 21, 2007 .Dt K8TEMP 8 .Os .Sh NAME .Nm k8temp .Nd "display on-die temperature readings from AMD K8 and K10 processors" .Sh SYNOPSIS .Nm .Op Fl nd .Op Ar selector ... | .Op Fl v | Fl h .Sh DESCRIPTION The .Nm utility displays temperature readings from AMD K8 and K10 processors using their on-die thermal diode(s). .Pp .Nm requires read-write access to /dev/pci, and thus must be run as root. .Pp The following options are available: .Bl -tag -width indent .It Fl v Display version and copyright information. .It Fl h Display help text. .It Fl n Show only temperature values. .It Fl d Display debug information, including raw register contents and interpreted subvalues, and an Advanced Power Management feature dump. .El .Pp Selectors specify which CPU, core and sensor to read, and are of the form cpu[:core[:sensor]]. Note, output order is fixed, and not (yet) defined by the order of selectors. .Sh EXAMPLES .Bl -tag -width -indent .It k8temp 1:0:0 Display reading for CPU1, core 0, sensor 0. .It k8temp 1:0 Display reading for CPU1, core 0, all available sensors. .It k8temp -d 0 2 Display reading for CPU 0 and CPU2, all available cores and sensors. Display debug output. .El .Sh BUGS .Nm may cause unsupported systems to reboot, crash or explode. .Pp Core numbers on single core systems may be incorrect (e.g. core 1 but no core 0). .Pp Running multiple copies of .Nm at once could result in readings being taken from incorrect cores. .Pp Readings from K10's are experimental. Limited testing suggests they're 10-20 degrees too low. .Sh HISTORY .Bl -tag -width indent .It 0.1.0, 2007-10-21 First release. .It 0.1.1, 2007-10-22 Fixes a serious error resulting in writes to a bogus PCI register. .It 0.2.0, 2007-10-25 Add support for diode offset correction and debugging options. Add CPUID check. .It 0.3.0, 2007-12-04 Add tentative support for OpenBSD and NetBSD. Remove (meaningless) diode offset correction. Introduce value-only output mode and sensor selector arguments. .It 0.4.0, 2008-06-22 Add preliminary K10 (Barcelona/Phenom) support. .El .Sh SEE ALSO BIOS and Kernel Developer's Guide for AMD NPT Family 0fh Processors. Section 4.6.23, Thermtrip Status Register. .Pp AMD CPUID Specification, CPUID Fn8000_0007, Advanced Power Management Information. .Pp BIOS and Kernel Developer's Guide For AMD Family 10h Processors. Section 3.6.F3xA4, Reported Temperature Control Register. .Sh AUTHOR .An "Thomas Hurst" Aq tom@hur.st k8temp-0.4.0/k8temp.c0000644000000000000000000001723311027545555014460 0ustar00usergroup00000000000000/*- * Copyright (c) 2007 Thomas Hurst * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ #define K8TEMP_VERSION "0.4.0" /* * k8temp -- AMD K8 (AMD64, Opteron) on-die thermal sensor reader for FreeBSD. * * DragonFlyBSD should work fine, since it has pretty much the same /dev/pci. * OpenBSD should work with -DWITHOUT_PCIOCGETCONF using a kernel with USER_PCI. * NetBSD might work with -DWITH_LIBPCI, but it's only been vaguely build tested. */ #include #include #include #include #include #include #include #include "k8temp_pci.h" #include "k8temp.h" static int debug = 0; static int k10 = 0; static void usage(int exit_code) { fprintf((exit_code == EX_OK ? stdout : stderr), "%s\n%s\n%s\n%s\n%s\n", "usage: k8temp [-nd] [cpu[:core[:sensor]] ...] | [-v | -h]", " -d Dump debugging info", " -h Display this help text", " -n Only display values", " -v Display version information"); exit(exit_code); } static void version(void) { printf("k8temp v%s\nCopyright 2007-2008 Thomas Hurst \n", K8TEMP_VERSION); exit(EX_OK); } static void check_cpuid(void) { unsigned int vendor[3]; unsigned int maxeid,cpuid,pwrmgt,unused; int i, model, extmodel, family, extfamily, stepping; asm("cpuid": "=a" (unused), "=b" (vendor[0]), "=c" (vendor[2]), "=d" (vendor[1]) : "a" (0)); asm("cpuid": "=a" (cpuid), "=b" (unused), "=c" (unused), "=d" (unused) : "a" (1)); model = (cpuid >> 4) & 0xf; family = (cpuid >> 8) & 0xf; stepping = cpuid & 0xf; extmodel = (cpuid >> 16) & 0xf; extfamily = (cpuid >> 20) & 0xff; k10 = (extfamily == 1 && family == 0xf); if (debug) fprintf(stderr, "CPUID: Vendor: %.12s, 0x%x: Model=%x%x Family=%x+%x " "Stepping=%d\n", (char *)vendor, cpuid, extmodel, model, family, extfamily, stepping); if (0 != memcmp((char *)&vendor, "AuthenticAMD", (size_t) 12)) errx(EX_UNAVAILABLE, "Only AMD CPU's are supported by k8temp"); asm("cpuid": "=a" (maxeid), "=b" (unused), "=c" (unused), "=d" (unused) : "a" (CPUID_EXTENDED)); if (maxeid >= CPUID_POWERMGT) { asm("cpuid": "=a" (unused), "=b" (unused), "=c" (unused), "=d" (pwrmgt) : "a" (CPUID_POWERMGT)); if (debug) { /* overkill \o/ */ fprintf(stderr, "Advanced Power Management=0x%x\n", pwrmgt); i = 0; do { fprintf(stderr, " %20s: %s\n", advPwrMgtFlags[i], (pwrmgt >> i) & 1 ? "Yes" : "No"); } while (advPwrMgtFlags[++i]); } if (!(pwrmgt & 1)) errx(EX_UNAVAILABLE, "Thermal sensor support not reported in CPUID"); } else errx(EX_UNAVAILABLE, "CPU lacks Advanced Power Management support"); /* Linux only checks these 3 */ if (cpuid == 0xf40 || cpuid == 0xf50 || cpuid == 0xf51) errx(EX_UNAVAILABLE, "This CPU stepping does not support thermal sensors."); } static int get_temp_k10(k8_pcidev dev, int core, int sensor) { static int thermtp = 0; uint32_t temp, therm; (void)core; (void)sensor; if (core > 0 || sensor > 0) return(TEMP_ERR); if (!k8_pci_read_word(dev, K10_THERM_REG, &temp)) return(TEMP_ERR); if (debug) fprintf(stderr, "Temp=%x\n", temp); if (!k8_pci_read_word(dev, K10_THERMTRIP_REG, &therm)) return(TEMP_ERR); if (debug) fprintf(stderr, "ThermTrip=%x\n", therm); if (K10_THERMTRIP(therm) && !thermtp) { fprintf(stderr, "Thermal trip bit set, system overheating?\n"); thermtp = 1; } return(K10_CURTMP(temp) / 8); } static int get_temp(k8_pcidev dev, int core, int sensor) { static int thermtp = 0; uint32_t ctrl,therm; if (!k8_pci_read_byte(dev, THERM_REG, &ctrl)) return(TEMP_ERR); if (core == 1) /* CPU0 has the bit set according to datasheet */ ctrl &= ~SEL_CORE; else if (core == 0) ctrl |= SEL_CORE; else return(TEMP_ERR); if (sensor == 0) ctrl &= ~SEL_SENSOR; else if (sensor == 1) ctrl |= SEL_SENSOR; else return(TEMP_ERR); if (!k8_pci_write_byte(dev, THERM_REG, ctrl)) return(TEMP_ERR); if (!k8_pci_read_word(dev, THERM_REG, &therm)) return(TEMP_ERR); /* verify the selection took */ if ((ctrl & (SEL_CORE|SEL_SENSOR)) != (therm & (SEL_CORE|SEL_SENSOR))) return(TEMP_ERR); if (THERMTRIP(therm) && !thermtp) { fprintf(stderr, "Thermal trip bit set, system overheating?\n"); thermtp = 1; } if (debug) fprintf(stderr, "Thermtrip=0x%08x (CurTmp=0x%02x (%dc) TjOffset=0x%02x DiodeOffset=0x%02x (%dc))\n", therm, CURTMP(therm), CURTMP(therm) + TEMP_MIN, TJOFFSET(therm), DIODEOFFSET(therm), OFFSET_MAX - DIODEOFFSET(therm)); return(CURTMP(therm) + TEMP_MIN); } int main(int argc, char *argv[]) { k8_pcidev devs[MAX_CPU]; int cpucount,cpu,core,sensor; int temp; int exit_code = EX_UNAVAILABLE; int opt; int value_only = 0; int i; char selections[MAX_CPU][MAX_CORE][MAX_SENSOR]; int selcount,selected = 0; while ((opt = getopt(argc, argv, "dhnv")) != -1) switch (opt) { case 'd': debug = 1; break; case 'n': value_only = 1; break; case 'v': version(); case 'h': usage(EX_OK); default: usage(EX_USAGE); } bzero(&selections, sizeof(selections)); for (i = optind; i < argc; i++) { selcount = sscanf(argv[i], "%u:%u:%u", &cpu, &core, &sensor); selected += selcount; if (selcount > 0 && cpu >= MAX_CPU) errx(EX_USAGE, "CPU selector %d out of range 0-%d", cpu, MAX_CPU - 1); if (selcount > 1 && core >= MAX_CORE) errx(EX_USAGE, "Core selector %d out of range 0-%d", cpu, MAX_CORE - 1); if (selcount > 2 && sensor >= MAX_SENSOR) errx(EX_USAGE, "Sensor selector %d out of range 0-%d", cpu, MAX_SENSOR - 1); switch (selcount) { case 1: memset(selections[cpu], 1, sizeof(selections[cpu])); break; case 2: memset(selections[cpu][core], 1, sizeof(selections[cpu][core])); break; case 3: selections[cpu][core][sensor] = 1; break; case 0: default: warnx("Illegal selector: %s", argv[i]); usage(EX_USAGE); } } check_cpuid(); k8_pci_init(); int devid = k10 ? PCI_DEVICE_ID_AMD_K10_MISC_CTRL : PCI_DEVICE_ID_AMD_K8_MISC_CTRL; cpucount = k8_pci_vendor_device_list(PCI_VENDOR_ID_AMD, devid, devs, MAX_CPU); for (cpu=0; cpu <= cpucount; cpu++) { for (core = 0; core < MAX_CORE; core++) { for (sensor = 0; sensor < MAX_SENSOR; sensor++) { if (selected > 0 && !selections[cpu][core][sensor]) continue; if (k10) temp = get_temp_k10(devs[cpu], core, sensor); else temp = get_temp(devs[cpu], core, sensor); if (temp > TEMP_MIN) { if (value_only) printf("%d\n", temp); else printf("CPU %d Core %d Sensor %d: %dc\n", cpu, core, sensor, temp); exit_code = EX_OK; } } } } k8_pci_close(); exit(exit_code); } k8temp-0.4.0/k8temp.h0000644000000000000000000000312111027545555014454 0ustar00usergroup00000000000000 #ifndef _K8TEMP_H_ #define PCI_VENDOR_ID_AMD 0x1022 #define PCI_DEVICE_ID_AMD_K8_MISC_CTRL 0x1103 #define PCI_DEVICE_ID_AMD_K10_MISC_CTRL 0x1203 /* * BIOS and Kernel Developer's Guide (BKDG) For AMD Family 10h Processors * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/31116.pdf * * These aren't used anywhere yet. */ #define K10_THERM_REG 0xa4 #define K10_THERMTRIP_REG 0xe4 #define K10_CURTMP(val) (((val) >> 21) & 0xfff) #define K10_THERMTRIP(val) ((val >> 1) & 1) /* * See section 4.6.23, Thermtrip Status Register: * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/32559.pdf */ #define THERM_REG 0xe4 #define SEL_CORE (1 << 2) /* ThermSenseCoreSel */ #define SEL_SENSOR (1 << 6) /* ThermSenseSel */ #define CURTMP(val) (((val) >> 16) & 0xff) #define TJOFFSET(val) (((val) >> 24) & 0xf) #define DIODEOFFSET(val) (((val) >> 8) & 0x3f) #define THERMTRIP(val) ((val) & 1) #define MAX_CPU 32 #define MAX_CORE 2 #define MAX_SENSOR 2 #define OFFSET_MAX 11 #define TEMP_MIN -49 #define TEMP_ERR -255 #define CPUID_EXTENDED 0x80000000 #define CPUID_POWERMGT 0x80000007 static void check_cpuid(void); static int get_temp(k8_pcidev dev, int core, int sensor); static void usage(int exit_code); static void version(void); int main(int argc, char *argv[]); const char *advPwrMgtFlags[] = { "Temperature sensor", "Frequency ID control", "Voltage ID control", "THERMTRIP support", "HW Thermal control", "SW Thermal control", "100MHz multipliers", "HW P-State control", "TSC Invariant", NULL, }; #endif k8temp-0.4.0/k8temp_devpci.c0000644000000000000000000000612511027545555016010 0ustar00usergroup00000000000000/* * k8temp functions for scanning PCI devices and reading/writing * to registers on them, via FreeBSD-style /dev/pci * * Supported on FreeBSD and DragonFlyBSD. * * OpenBSD should work with USER_PCI and -DWITHOUT_PCIOCGETCONF * * NetBSD needs libpci, using pcibus_conf_read()/write() * * Linux can probably work with /proc/pci or something? * * No idea about Solaris. */ #include #include "k8temp_pci.h" static int fd; void k8_pci_init() { if ((fd = open(_PATH_DEVPCI, O_RDWR, 0)) < 0) err(EX_OSFILE, "open(\"%s\")", _PATH_DEVPCI); } void k8_pci_close() { if (fd) close(fd); } int k8_pci_vendor_device_list(uint32_t vendor_id, uint32_t device_id, k8_pcidev devs[], int maxdev) { int matches = -1; #ifndef WITHOUT_PCIOCGETCONF struct pci_conf_io pc; struct pci_match_conf pat; struct pci_conf conf[255], *p; bzero(&pc, sizeof(struct pci_conf_io)); bzero(&pat, sizeof(struct pci_match_conf)); pat.pc_vendor = vendor_id; pat.pc_device = device_id; pat.flags = PCI_GETCONF_MATCH_VENDOR | PCI_GETCONF_MATCH_DEVICE; pc.patterns = &pat; pc.num_patterns = 1; pc.pat_buf_len = sizeof(pat); pc.match_buf_len = sizeof(conf); pc.matches = conf; if (ioctl(fd, PCIOCGETCONF, &pc) == -1 || pc.status == PCI_GETCONF_ERROR) { warn("ioctl(PCIOCGETCONF) failed"); return(-1); } for (p = conf; p < &conf[pc.num_matches]; p++) { if (matches < maxdev) memcpy(&devs[++matches], &p->pc_sel, sizeof(k8_pcidev)); } #else /* should work with OpenBSD's USER_PCI */ uint8_t dev,func; uint32_t pcireg; k8_pcidev sel; bzero(&sel, sizeof(k8_pcidev)); sel.pc_bus = 0; for (dev=0; dev < 32; dev++) { sel.pc_dev = dev; for (func=0; func < 8; func++) { sel.pc_func = func; if (k8_pci_read_word(sel, 0, &pcireg)) { if ((pcireg & 0xffff) == vendor_id && ((pcireg >> 16) & 0xffff) == device_id && matches < maxdev) { memcpy(&devs[++matches], &sel, sizeof(k8_pcidev)); } } } } #endif return(matches); } int k8_pci_read(k8_pcidev dev, int offset, uint32_t *data, int width) { struct pci_io ctrl; bzero(&ctrl, sizeof(ctrl)); ctrl.pi_sel = dev; ctrl.pi_reg = offset; ctrl.pi_width = width; if (ioctl(fd, PCIOCREAD, &ctrl) == -1) { warn("Register read %x, %d bytes failed", offset, width); return(0); } *data = ctrl.pi_data; return(width); } int k8_pci_read_byte(k8_pcidev dev, int offset, uint32_t *data) { return(k8_pci_read(dev, offset, data, 1)); } int k8_pci_read_word(k8_pcidev dev, int offset, uint32_t *data) { return(k8_pci_read(dev, offset, data, 4)); } int k8_pci_write(k8_pcidev dev, int offset, uint32_t data, int width) { struct pci_io ctrl; bzero(&ctrl, sizeof(ctrl)); ctrl.pi_sel = dev; ctrl.pi_reg = offset; ctrl.pi_width = width; ctrl.pi_data = data; if (ioctl(fd, PCIOCWRITE, &ctrl) == -1) { warn("Register write %x, %d bytes failed", offset, width); return(0); } return(width); } int k8_pci_write_byte(k8_pcidev dev, int offset, uint32_t data) { return(k8_pci_write(dev, offset, data, 1)); } int k8_pci_write_word(k8_pcidev dev, int offset, uint32_t data) { return(k8_pci_write(dev, offset, data, 4)); } k8temp-0.4.0/k8temp_devpci.h0000644000000000000000000000047411027545555016016 0ustar00usergroup00000000000000 #ifndef _K8TEMP_DEVPCI_H_ #define _K8_TEMP_DEVPCI_H #include #include #include #include #include #include #include #include #include #define _PATH_DEVPCI "/dev/pci" typedef struct pcisel k8_pcidev; #endif k8temp-0.4.0/k8temp_libpci.c0000644000000000000000000000441211027545555015775 0ustar00usergroup00000000000000/* * k8temp functions for scanning PCI devices and reading/writing * to registers on them, via NetBSD-style libpci and /dev/pci0 * * Untested, unfinished. Beware of dog. */ #include #include "k8temp_pci.h" static int fd; void k8_pci_init() { if ((fd = open(_PATH_DEVPCI, O_RDWR, 0)) < 0) err(EX_OSFILE, "open(\"%s\")", _PATH_DEVPCI); } void k8_pci_close() { if (fd) close(fd); } int k8_pci_vendor_device_list(uint32_t vendor_id, uint32_t device_id, k8_pcidev devs[], int maxdev) { int matches = -1; uint8_t dev,func; uint32_t pcireg; k8_pcidev sel; bzero(&sel, sizeof(k8_pcidev)); sel.pc_bus = 0; for (dev=0; dev < 32; dev++) { sel.pc_dev = dev; for (func=0; func < 8; func++) { sel.pc_func = func; if (k8_pci_read_word(sel, 0, &pcireg) && (pcireg & 0xffff) == vendor_id && ((pcireg >> 16) & 0xffff) == device_id && matches < maxdev) { memcpy(&devs[++matches], &sel, sizeof(k8_pcidev)); } } } return(matches); } int k8_pci_read(k8_pcidev dev, int offset, uint32_t *data, int width) { if (pcibus_conf_read(fd, dev.pc_bus, dev.pc_dev, dev.pc_func, offset, (uint32_t *)&data) < 0) { warn("Register read %x, %d bytes failed", offset, width); return(0); } switch (width) { case 1: *data = *data & 0xff; break; case 4: break; default: warnx("Width %d register reads unsupported", width); } return(width); } int k8_pci_read_byte(k8_pcidev dev, int offset, uint32_t *data) { return(k8_pci_read(dev, offset, data, 1)); } int k8_pci_read_word(k8_pcidev dev, int offset, uint32_t *data) { return(k8_pci_read(dev, offset, data, 4)); } int k8_pci_write(k8_pcidev dev, int offset, uint32_t data, int width) { /* XXX: Note, libpci doesn't support !4 byte writes. * Luckily the upper 24 bits of Thermtrip is read-only, so it doesn't * matter, but we should take care if we end up writing anywhere else. */ if (pcibus_conf_write(fd, dev.pc_bus, dev.pc_dev, dev.pc_func, offset, data) < 0) { warn("Register write %x, %d bytes failed", offset, width); return(0); } return(4); } int k8_pci_write_byte(k8_pcidev dev, int offset, uint32_t data) { return(k8_pci_write(dev, offset, data, 1)); } int k8_pci_write_word(k8_pcidev dev, int offset, uint32_t data) { return(k8_pci_write(dev, offset, data, 4)); } k8temp-0.4.0/k8temp_libpci.h0000644000000000000000000000047211027545555016004 0ustar00usergroup00000000000000 #ifndef _K8TEMP_LIBPCI_H_ #define _K8_TEMP_LIBPCI_H #include #include #include #include #include #include #include #define _PATH_DEVPCI "/dev/pci0" typedef struct { uint8_t pc_bus; uint8_t pc_dev; uint8_t pc_func; } k8_pcidev; #endif k8temp-0.4.0/k8temp_pci.h0000644000000000000000000000124011027545555015307 0ustar00usergroup00000000000000 #ifdef WITH_LIBPCI #include "k8temp_libpci.h" #else #include "k8temp_devpci.h" #endif /* PCI access functions */ void k8_pci_init(void); void k8_pci_close(void); int k8_pci_vendor_device_list(uint32_t vendor_id, uint32_t device_id, k8_pcidev devs[], int max_dev); int k8_pci_read(k8_pcidev dev, int offset, uint32_t *data, int width); int k8_pci_read_byte(k8_pcidev dev, int offset, uint32_t *data); int k8_pci_read_word(k8_pcidev dev, int offset, uint32_t *data); int k8_pci_write(k8_pcidev dev, int offset, uint32_t data, int width); int k8_pci_write_byte(k8_pcidev dev, int offset, uint32_t data); int k8_pci_write_word(k8_pcidev dev, int offset, uint32_t data);