pax_global_header00006660000000000000000000000064123710224110014503gustar00rootroot0000000000000052 comment=dd7892235d79b03421eff986171bd8a14d199014 mighty-1284p-1/000077500000000000000000000000001237102241100132625ustar00rootroot00000000000000mighty-1284p-1/.gitignore000066400000000000000000000000261237102241100152500ustar00rootroot00000000000000*.o *.elf *.hex *.lst mighty-1284p-1/Changelog000066400000000000000000000004671237102241100151030ustar00rootroot00000000000000Version 1: * *: Fork from https://github.com/maniacbug/mighty-1284p/. * README.md: Update. * .gitignore: Update. * cores: Remove outdated copy of Arduino source tree. * bootloaders: Build from source. * variants: Remove alternative pinouts. * variants/standard/pins_arduino.h: Correct NUM_DIGITAL_PINS. mighty-1284p-1/README.md000066400000000000000000000024761237102241100145520ustar00rootroot00000000000000# Mighty 1284P: Platform files for Arduino to run on ATmega1284P ## What is it? Everything you need to run Arduino on ATmega1284P. ## Current state This is a fork of Maniacbug's work, which seems to have been abandoned. It uses upstream Arduino files as much as possible instead of (out of date) copies. It has been tested and is considered complete. Please report any bugs you may find. ## Installation Recommended method: on your Debian system, install the package from the repository. Alternatively: 1. Download the [ZIP File](https://github.com/wijnen/mighty-1284p/zipball/master) 2. Unzip it a folder called 'hardware' in your sketchbook directory, e.g. ~/Arduino/hardware/mighty-1284p 3. Restart the IDE 4. Select Tools > Board > Mighty 1284p 16MHz using Optiboot 5. To burn the bootloader, follow the Arduino [Bootloader](http://arduino.cc/en/Hacking/Bootloader) instructions. ## Requirements * Works only on Arduino >= 1.0 * Cannot be burned using [USBtinyISP](http://www.ladyada.net/make/usbtinyisp/). That programmer cannot flash to chips with >64k flash size. ## See also http://maniacbug.wordpress.com/2011/11/27/arduino-on-atmega1284p-4/ ## Supported Boards * 'Mighty 1284p using Optiboot'. * 'Original Mighty 1284p'. Uses a different booloader; if you have a board with this, burning optiboot is recommended. mighty-1284p-1/boards.txt000066400000000000000000000022511237102241100152750ustar00rootroot00000000000000############################################################## mighty_opt.name=Mighty 1284p using Optiboot mighty_opt.upload.protocol=arduino mighty_opt.upload.maximum_size=130048 mighty_opt.upload.speed=115200 mighty_opt.bootloader.low_fuses=0xff mighty_opt.bootloader.high_fuses=0xde mighty_opt.bootloader.extended_fuses=0xfd mighty_opt.bootloader.path=optiboot mighty_opt.bootloader.file=optiboot_atmega1284p.hex mighty_opt.bootloader.unlock_bits=0x3F mighty_opt.bootloader.lock_bits=0x0F mighty_opt.build.mcu=atmega1284p mighty_opt.build.f_cpu=16000000L mighty_opt.build.core=arduino:arduino mighty_opt.build.variant=standard ############################################################## mighty.name=Original Mighty 1284p mighty.upload.protocol=stk500v1 mighty.upload.maximum_size=129024 mighty.upload.speed=57600 mighty.bootloader.low_fuses=0xff mighty.bootloader.high_fuses=0xdc mighty.bootloader.extended_fuses=0xfd mighty.bootloader.path=standard mighty.bootloader.file=ATmegaBOOT_1284P.hex mighty.bootloader.unlock_bits=0x3F mighty.bootloader.lock_bits=0x0F mighty.build.mcu=atmega1284p mighty.build.f_cpu=16000000L mighty.build.core=arduino:arduino mighty.build.variant=standard mighty-1284p-1/bootloaders/000077500000000000000000000000001237102241100155775ustar00rootroot00000000000000mighty-1284p-1/bootloaders/optiboot/000077500000000000000000000000001237102241100174365ustar00rootroot00000000000000mighty-1284p-1/bootloaders/optiboot/Makefile000066400000000000000000000113421237102241100210770ustar00rootroot00000000000000# Makefile for ATmegaBOOT # E.Lins, 18.7.2005 # $Id$ # # Instructions # # To make bootloader .hex file: # make diecimila # make lilypad # make ng # etc... # # To burn bootloader .hex file: # make diecimila_isp # make lilypad_isp # make ng_isp # etc... # program name should not be changed... PROGRAM = optiboot # The default behavior is to build using tools that are in the users # current path variables, but we can also build using an installed # Arduino user IDE setup, or the Arduino source tree. # Uncomment this next lines to build within the arduino environment, # using the arduino-included avrgcc toolset (mac and pc) # ENV ?= arduino # ENV ?= arduinodev # OS ?= macosx # OS ?= windows # enter the parameters for the avrdude isp tool ISPTOOL = avrisp ISPPORT = /dev/ttyUSB0 ISPSPEED = -b 19200 MCU_TARGET = atmega168 LDSECTIONS = -Wl,--section-start=.text=0x3e00 -Wl,--section-start=.version=0x3ffe # Build environments # Start of some ugly makefile-isms to allow optiboot to be built # in several different environments. See the README.TXT file for # details. # default fixpath = $(1) # the efuse should really be 0xf8; since, however, only the lower # three bits of that byte are used on the atmega168, avrdude gets # confused if you specify 1's for the higher bits, see: # http://tinker.it/now/2007/02/24/the-tale-of-avrdude-atmega168-and-extended-bits-fuses/ # # similarly, the lock bits should be 0xff instead of 0x3f (to # unlock the bootloader section) and 0xcf instead of 0x2f (to # lock it), but since the high two bits of the lock byte are # unused, avrdude would get confused. ISPFUSES = $(AVRDUDE_ROOT)avrdude $(AVRDUDE_CONF) -c $(ISPTOOL) \ -p $(MCU_TARGET) -P $(ISPPORT) $(ISPSPEED) \ -e -u -U lock:w:0x3f:m -U efuse:w:0x$(EFUSE):m \ -U hfuse:w:0x$(HFUSE):m -U lfuse:w:0x$(LFUSE):m ISPFLASH = $(AVRDUDE_ROOT)avrdude $(AVRDUDE_CONF) -c $(ISPTOOL) \ -p $(MCU_TARGET) -P $(ISPPORT) $(ISPSPEED) -V \ -U flash:w:$(PROGRAM)_$(TARGET).hex -U lock:w:0x2f:m STK500 = "C:\Program Files\Atmel\AVR Tools\STK500\Stk500.exe" STK500-1 = $(STK500) -e -d$(MCU_TARGET) -pf -vf -if$(PROGRAM)_$(TARGET).hex \ -lFF -LFF -f$(HFUSE)$(LFUSE) -EF8 -ms -q -cUSB -I200kHz -s -wt STK500-2 = $(STK500) -d$(MCU_TARGET) -ms -q -lCF -LCF -cUSB -I200kHz -s -wt OBJ = $(PROGRAM).o OPTIMIZE = -Os -fno-inline-small-functions -fno-split-wide-types DEFS = LIBS = CC = $(GCCROOT)avr-gcc # Override is only needed by avr-lib build system. override CFLAGS = -g -Wall $(OPTIMIZE) -mmcu=$(MCU_TARGET) -DF_CPU=$(AVR_FREQ) $(DEFS) override LDFLAGS = $(LDSECTIONS) -Wl,--relax -Wl,--gc-sections -nostartfiles -nostdlib OBJCOPY = $(GCCROOT)avr-objcopy OBJDUMP = $(call fixpath,$(GCCROOT)avr-objdump) SIZE = $(GCCROOT)avr-size atmega1284: TARGET = atmega1284p atmega1284: MCU_TARGET = atmega1284p atmega1284: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200' '-DBIGBOOT' atmega1284: AVR_FREQ = 16000000L atmega1284: LDSECTIONS = -Wl,--section-start=.text=0x1fc00 atmega1284: $(PROGRAM)_atmega1284p.hex atmega1284: $(PROGRAM)_atmega1284p.lst atmega1284_isp: atmega1284 atmega1284_isp: TARGET = atmega1284p atmega1284_isp: MCU_TARGET = atmega1284p # 1024 byte boot atmega1284_isp: HFUSE = DE # Low power xtal (16MHz) 16KCK/14CK+65ms atmega1284_isp: LFUSE = FF # 2.7V brownout atmega1284_isp: EFUSE = FD atmega1284_isp: isp atmega1284_slow: TARGET = atmega1284p_slow atmega1284_slow: MCU_TARGET = atmega1284p atmega1284_slow: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=19200' '-DBIGBOOT' atmega1284_slow: AVR_FREQ = 16000000L atmega1284_slow: LDSECTIONS = -Wl,--section-start=.text=0x1fc00 atmega1284_slow: $(PROGRAM)_atmega1284p_slow.hex atmega1284_slow: $(PROGRAM)_atmega1284p_slow.lst atmega1284_slow_isp: atmega1284_slow atmega1284_slow_isp: TARGET = atmega1284p_slow atmega1284_slow_isp: MCU_TARGET = atmega1284p # 1024 byte boot atmega1284_slow_isp: HFUSE = DE # Low power xtal (16MHz) 16KCK/14CK+65ms atmega1284_slow_isp: LFUSE = FF # 2.7V brownout atmega1284_slow_isp: EFUSE = FD atmega1284_slow_isp: isp # # Generic build instructions # # isp: $(TARGET) $(ISPFUSES) $(ISPFLASH) isp-stk500: $(PROGRAM)_$(TARGET).hex $(STK500-1) $(STK500-2) %.elf: $(OBJ) $(CC) $(CFLAGS) $(LDFLAGS) -o $@ $^ $(LIBS) $(SIZE) $@ clean: rm -rf *.o *.elf *.lst *.map *.sym *.lss *.eep *.srec *.bin *.hex %.lst: %.elf $(OBJDUMP) -h -S $< > $@ %.hex: %.elf $(OBJCOPY) -j .text -j .data -j .version --set-section-flags .version=alloc,load -O ihex $< $@ %.srec: %.elf $(OBJCOPY) -j .text -j .data -j .version --set-section-flags .version=alloc,load -O srec $< $@ %.bin: %.elf $(OBJCOPY) -j .text -j .data -j .version --set-section-flags .version=alloc,load -O binary $< $@ mighty-1284p-1/bootloaders/optiboot/boot.h000066400000000000000000001023331237102241100205540ustar00rootroot00000000000000/* Modified to use out for SPM access ** Peter Knight, Optiboot project http://optiboot.googlecode.com ** ** Todo: Tidy up ** ** "_short" routines execute 1 cycle faster and use 1 less word of flash ** by using "out" instruction instead of "sts". ** ** Additional elpm variants that trust the value of RAMPZ */ /* Copyright (c) 2002, 2003, 2004, 2005, 2006, 2007 Eric B. Weddington All rights reserved. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: * Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. * Neither the name of the copyright holders nor the names of contributors may be used to endorse or promote products derived from this software without specific prior written permission. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /* $Id: boot.h,v 1.27.2.3 2008/09/30 13:58:48 arcanum Exp $ */ #ifndef _AVR_BOOT_H_ #define _AVR_BOOT_H_ 1 /** \file */ /** \defgroup avr_boot : Bootloader Support Utilities \code #include #include \endcode The macros in this module provide a C language interface to the bootloader support functionality of certain AVR processors. These macros are designed to work with all sizes of flash memory. Global interrupts are not automatically disabled for these macros. It is left up to the programmer to do this. See the code example below. Also see the processor datasheet for caveats on having global interrupts enabled during writing of the Flash. \note Not all AVR processors provide bootloader support. See your processor datasheet to see if it provides bootloader support. \todo From email with Marek: On smaller devices (all except ATmega64/128), __SPM_REG is in the I/O space, accessible with the shorter "in" and "out" instructions - since the boot loader has a limited size, this could be an important optimization. \par API Usage Example The following code shows typical usage of the boot API. \code #include #include #include void boot_program_page (uint32_t page, uint8_t *buf) { uint16_t i; uint8_t sreg; // Disable interrupts. sreg = SREG; cli(); eeprom_busy_wait (); boot_page_erase (page); boot_spm_busy_wait (); // Wait until the memory is erased. for (i=0; i #include #include #include /* Check for SPM Control Register in processor. */ #if defined (SPMCSR) # define __SPM_REG SPMCSR #elif defined (SPMCR) # define __SPM_REG SPMCR #else # error AVR processor does not provide bootloader support! #endif /* Check for SPM Enable bit. */ #if defined(SPMEN) # define __SPM_ENABLE SPMEN #elif defined(SELFPRGEN) # define __SPM_ENABLE SELFPRGEN #else # error Cannot find SPM Enable bit definition! #endif /** \ingroup avr_boot \def BOOTLOADER_SECTION Used to declare a function or variable to be placed into a new section called .bootloader. This section and its contents can then be relocated to any address (such as the bootloader NRWW area) at link-time. */ #define BOOTLOADER_SECTION __attribute__ ((section (".bootloader"))) /* Create common bit definitions. */ #ifdef ASB #define __COMMON_ASB ASB #else #define __COMMON_ASB RWWSB #endif #ifdef ASRE #define __COMMON_ASRE ASRE #else #define __COMMON_ASRE RWWSRE #endif /* Define the bit positions of the Boot Lock Bits. */ #define BLB12 5 #define BLB11 4 #define BLB02 3 #define BLB01 2 /** \ingroup avr_boot \def boot_spm_interrupt_enable() Enable the SPM interrupt. */ #define boot_spm_interrupt_enable() (__SPM_REG |= (uint8_t)_BV(SPMIE)) /** \ingroup avr_boot \def boot_spm_interrupt_disable() Disable the SPM interrupt. */ #define boot_spm_interrupt_disable() (__SPM_REG &= (uint8_t)~_BV(SPMIE)) /** \ingroup avr_boot \def boot_is_spm_interrupt() Check if the SPM interrupt is enabled. */ #define boot_is_spm_interrupt() (__SPM_REG & (uint8_t)_BV(SPMIE)) /** \ingroup avr_boot \def boot_rww_busy() Check if the RWW section is busy. */ #define boot_rww_busy() (__SPM_REG & (uint8_t)_BV(__COMMON_ASB)) /** \ingroup avr_boot \def boot_spm_busy() Check if the SPM instruction is busy. */ #define boot_spm_busy() (__SPM_REG & (uint8_t)_BV(__SPM_ENABLE)) /** \ingroup avr_boot \def boot_spm_busy_wait() Wait while the SPM instruction is busy. */ #define boot_spm_busy_wait() do{}while(boot_spm_busy()) #define __BOOT_PAGE_ERASE (_BV(__SPM_ENABLE) | _BV(PGERS)) #define __BOOT_PAGE_WRITE (_BV(__SPM_ENABLE) | _BV(PGWRT)) #define __BOOT_PAGE_FILL _BV(__SPM_ENABLE) #define __BOOT_RWW_ENABLE (_BV(__SPM_ENABLE) | _BV(__COMMON_ASRE)) #define __BOOT_LOCK_BITS_SET (_BV(__SPM_ENABLE) | _BV(BLBSET)) #define __boot_page_fill_short(address, data) \ (__extension__({ \ __asm__ __volatile__ \ ( \ "movw r0, %3\n\t" \ "out %0, %1\n\t" \ "spm\n\t" \ "clr r1\n\t" \ : \ : "i" (_SFR_IO_ADDR(__SPM_REG)), \ "r" ((uint8_t)__BOOT_PAGE_FILL), \ "z" ((uint16_t)address), \ "r" ((uint16_t)data) \ : "r0" \ ); \ })) #define __boot_page_fill_normal(address, data) \ (__extension__({ \ __asm__ __volatile__ \ ( \ "movw r0, %3\n\t" \ "sts %0, %1\n\t" \ "spm\n\t" \ "clr r1\n\t" \ : \ : "i" (_SFR_MEM_ADDR(__SPM_REG)), \ "r" ((uint8_t)__BOOT_PAGE_FILL), \ "z" ((uint16_t)address), \ "r" ((uint16_t)data) \ : "r0" \ ); \ })) #define __boot_page_fill_alternate(address, data)\ (__extension__({ \ __asm__ __volatile__ \ ( \ "movw r0, %3\n\t" \ "sts %0, %1\n\t" \ "spm\n\t" \ ".word 0xffff\n\t" \ "nop\n\t" \ "clr r1\n\t" \ : \ : "i" (_SFR_MEM_ADDR(__SPM_REG)), \ "r" ((uint8_t)__BOOT_PAGE_FILL), \ "z" ((uint16_t)address), \ "r" ((uint16_t)data) \ : "r0" \ ); \ })) #define __boot_page_fill_extended(address, data) \ (__extension__({ \ __asm__ __volatile__ \ ( \ "movw r0, %4\n\t" \ "movw r30, %A3\n\t" \ "sts %1, %C3\n\t" \ "sts %0, %2\n\t" \ "spm\n\t" \ "clr r1\n\t" \ : \ : "i" (_SFR_MEM_ADDR(__SPM_REG)), \ "i" (_SFR_MEM_ADDR(RAMPZ)), \ "r" ((uint8_t)__BOOT_PAGE_FILL), \ "r" ((uint32_t)address), \ "r" ((uint16_t)data) \ : "r0", "r30", "r31" \ ); \ })) #define __boot_page_fill_extended_short(address, data) \ (__extension__({ \ __asm__ __volatile__ \ ( \ "movw r0, %4\n\t" \ "movw r30, %A3\n\t" \ "out %1, %C3\n\t" \ "out %0, %2\n\t" \ "spm\n\t" \ "clr r1\n\t" \ : \ : "i" (_SFR_IO_ADDR(__SPM_REG)), \ "i" (_SFR_IO_ADDR(RAMPZ)), \ "r" ((uint8_t)__BOOT_PAGE_FILL), \ "r" ((uint32_t)address), \ "r" ((uint16_t)data) \ : "r0", "r30", "r31" \ ); \ })) #define __boot_page_erase_short(address) \ (__extension__({ \ __asm__ __volatile__ \ ( \ "out %0, %1\n\t" \ "spm\n\t" \ : \ : "i" (_SFR_IO_ADDR(__SPM_REG)), \ "r" ((uint8_t)__BOOT_PAGE_ERASE), \ "z" ((uint16_t)address) \ ); \ })) #define __boot_page_erase_normal(address) \ (__extension__({ \ __asm__ __volatile__ \ ( \ "sts %0, %1\n\t" \ "spm\n\t" \ : \ : "i" (_SFR_MEM_ADDR(__SPM_REG)), \ "r" ((uint8_t)__BOOT_PAGE_ERASE), \ "z" ((uint16_t)address) \ ); \ })) #define __boot_page_erase_alternate(address) \ (__extension__({ \ __asm__ __volatile__ \ ( \ "sts %0, %1\n\t" \ "spm\n\t" \ ".word 0xffff\n\t" \ "nop\n\t" \ : \ : "i" (_SFR_MEM_ADDR(__SPM_REG)), \ "r" ((uint8_t)__BOOT_PAGE_ERASE), \ "z" ((uint16_t)address) \ ); \ })) #define __boot_page_erase_extended(address) \ (__extension__({ \ __asm__ __volatile__ \ ( \ "movw r30, %A3\n\t" \ "sts %1, %C3\n\t" \ "sts %0, %2\n\t" \ "spm\n\t" \ : \ : "i" (_SFR_MEM_ADDR(__SPM_REG)), \ "i" (_SFR_MEM_ADDR(RAMPZ)), \ "r" ((uint8_t)__BOOT_PAGE_ERASE), \ "r" ((uint32_t)address) \ : "r30", "r31" \ ); \ })) #define __boot_page_erase_extended_short(address) \ (__extension__({ \ __asm__ __volatile__ \ ( \ "movw r30, %A3\n\t" \ "out %1, %C3\n\t" \ "out %0, %2\n\t" \ "spm\n\t" \ : \ : "i" (_SFR_IO_ADDR(__SPM_REG)), \ "i" (_SFR_IO_ADDR(RAMPZ)), \ "r" ((uint8_t)__BOOT_PAGE_ERASE), \ "r" ((uint32_t)address) \ : "r30", "r31" \ ); \ })) #define __boot_page_write_short(address) \ (__extension__({ \ __asm__ __volatile__ \ ( \ "out %0, %1\n\t" \ "spm\n\t" \ : \ : "i" (_SFR_IO_ADDR(__SPM_REG)), \ "r" ((uint8_t)__BOOT_PAGE_WRITE), \ "z" ((uint16_t)address) \ ); \ })) #define __boot_page_write_normal(address) \ (__extension__({ \ __asm__ __volatile__ \ ( \ "sts %0, %1\n\t" \ "spm\n\t" \ : \ : "i" (_SFR_MEM_ADDR(__SPM_REG)), \ "r" ((uint8_t)__BOOT_PAGE_WRITE), \ "z" ((uint16_t)address) \ ); \ })) #define __boot_page_write_alternate(address) \ (__extension__({ \ __asm__ __volatile__ \ ( \ "sts %0, %1\n\t" \ "spm\n\t" \ ".word 0xffff\n\t" \ "nop\n\t" \ : \ : "i" (_SFR_MEM_ADDR(__SPM_REG)), \ "r" ((uint8_t)__BOOT_PAGE_WRITE), \ "z" ((uint16_t)address) \ ); \ })) #define __boot_page_write_extended(address) \ (__extension__({ \ __asm__ __volatile__ \ ( \ "movw r30, %A3\n\t" \ "sts %1, %C3\n\t" \ "sts %0, %2\n\t" \ "spm\n\t" \ : \ : "i" (_SFR_MEM_ADDR(__SPM_REG)), \ "i" (_SFR_MEM_ADDR(RAMPZ)), \ "r" ((uint8_t)__BOOT_PAGE_WRITE), \ "r" ((uint32_t)address) \ : "r30", "r31" \ ); \ })) #define __boot_page_write_extended_short(address) \ (__extension__({ \ __asm__ __volatile__ \ ( \ "movw r30, %A3\n\t" \ "out %1, %C3\n\t" \ "out %0, %2\n\t" \ "spm\n\t" \ : \ : "i" (_SFR_IO_ADDR(__SPM_REG)), \ "i" (_SFR_IO_ADDR(RAMPZ)), \ "r" ((uint8_t)__BOOT_PAGE_WRITE), \ "r" ((uint32_t)address) \ : "r30", "r31" \ ); \ })) #define __boot_rww_enable_short() \ (__extension__({ \ __asm__ __volatile__ \ ( \ "out %0, %1\n\t" \ "spm\n\t" \ : \ : "i" (_SFR_IO_ADDR(__SPM_REG)), \ "r" ((uint8_t)__BOOT_RWW_ENABLE) \ ); \ })) #define __boot_rww_enable() \ (__extension__({ \ __asm__ __volatile__ \ ( \ "sts %0, %1\n\t" \ "spm\n\t" \ : \ : "i" (_SFR_MEM_ADDR(__SPM_REG)), \ "r" ((uint8_t)__BOOT_RWW_ENABLE) \ ); \ })) #define __boot_rww_enable_alternate() \ (__extension__({ \ __asm__ __volatile__ \ ( \ "sts %0, %1\n\t" \ "spm\n\t" \ ".word 0xffff\n\t" \ "nop\n\t" \ : \ : "i" (_SFR_MEM_ADDR(__SPM_REG)), \ "r" ((uint8_t)__BOOT_RWW_ENABLE) \ ); \ })) /* From the mega16/mega128 data sheets (maybe others): Bits by SPM To set the Boot Loader Lock bits, write the desired data to R0, write "X0001001" to SPMCR and execute SPM within four clock cycles after writing SPMCR. The only accessible Lock bits are the Boot Lock bits that may prevent the Application and Boot Loader section from any software update by the MCU. If bits 5..2 in R0 are cleared (zero), the corresponding Boot Lock bit will be programmed if an SPM instruction is executed within four cycles after BLBSET and SPMEN (or SELFPRGEN) are set in SPMCR. The Z-pointer is don't care during this operation, but for future compatibility it is recommended to load the Z-pointer with $0001 (same as used for reading the Lock bits). For future compatibility It is also recommended to set bits 7, 6, 1, and 0 in R0 to 1 when writing the Lock bits. When programming the Lock bits the entire Flash can be read during the operation. */ #define __boot_lock_bits_set_short(lock_bits) \ (__extension__({ \ uint8_t value = (uint8_t)(~(lock_bits)); \ __asm__ __volatile__ \ ( \ "ldi r30, 1\n\t" \ "ldi r31, 0\n\t" \ "mov r0, %2\n\t" \ "out %0, %1\n\t" \ "spm\n\t" \ : \ : "i" (_SFR_IO_ADDR(__SPM_REG)), \ "r" ((uint8_t)__BOOT_LOCK_BITS_SET), \ "r" (value) \ : "r0", "r30", "r31" \ ); \ })) #define __boot_lock_bits_set(lock_bits) \ (__extension__({ \ uint8_t value = (uint8_t)(~(lock_bits)); \ __asm__ __volatile__ \ ( \ "ldi r30, 1\n\t" \ "ldi r31, 0\n\t" \ "mov r0, %2\n\t" \ "sts %0, %1\n\t" \ "spm\n\t" \ : \ : "i" (_SFR_MEM_ADDR(__SPM_REG)), \ "r" ((uint8_t)__BOOT_LOCK_BITS_SET), \ "r" (value) \ : "r0", "r30", "r31" \ ); \ })) #define __boot_lock_bits_set_alternate(lock_bits) \ (__extension__({ \ uint8_t value = (uint8_t)(~(lock_bits)); \ __asm__ __volatile__ \ ( \ "ldi r30, 1\n\t" \ "ldi r31, 0\n\t" \ "mov r0, %2\n\t" \ "sts %0, %1\n\t" \ "spm\n\t" \ ".word 0xffff\n\t" \ "nop\n\t" \ : \ : "i" (_SFR_MEM_ADDR(__SPM_REG)), \ "r" ((uint8_t)__BOOT_LOCK_BITS_SET), \ "r" (value) \ : "r0", "r30", "r31" \ ); \ })) /* Reading lock and fuse bits: Similarly to writing the lock bits above, set BLBSET and SPMEN (or SELFPRGEN) bits in __SPMREG, and then (within four clock cycles) issue an LPM instruction. Z address: contents: 0x0000 low fuse bits 0x0001 lock bits 0x0002 extended fuse bits 0x0003 high fuse bits Sounds confusing, doesn't it? Unlike the macros in pgmspace.h, no need to care for non-enhanced cores here as these old cores do not provide SPM support anyway. */ /** \ingroup avr_boot \def GET_LOW_FUSE_BITS address to read the low fuse bits, using boot_lock_fuse_bits_get */ #define GET_LOW_FUSE_BITS (0x0000) /** \ingroup avr_boot \def GET_LOCK_BITS address to read the lock bits, using boot_lock_fuse_bits_get */ #define GET_LOCK_BITS (0x0001) /** \ingroup avr_boot \def GET_EXTENDED_FUSE_BITS address to read the extended fuse bits, using boot_lock_fuse_bits_get */ #define GET_EXTENDED_FUSE_BITS (0x0002) /** \ingroup avr_boot \def GET_HIGH_FUSE_BITS address to read the high fuse bits, using boot_lock_fuse_bits_get */ #define GET_HIGH_FUSE_BITS (0x0003) /** \ingroup avr_boot \def boot_lock_fuse_bits_get(address) Read the lock or fuse bits at \c address. Parameter \c address can be any of GET_LOW_FUSE_BITS, GET_LOCK_BITS, GET_EXTENDED_FUSE_BITS, or GET_HIGH_FUSE_BITS. \note The lock and fuse bits returned are the physical values, i.e. a bit returned as 0 means the corresponding fuse or lock bit is programmed. */ #define boot_lock_fuse_bits_get_short(address) \ (__extension__({ \ uint8_t __result; \ __asm__ __volatile__ \ ( \ "ldi r30, %3\n\t" \ "ldi r31, 0\n\t" \ "out %1, %2\n\t" \ "lpm %0, Z\n\t" \ : "=r" (__result) \ : "i" (_SFR_IO_ADDR(__SPM_REG)), \ "r" ((uint8_t)__BOOT_LOCK_BITS_SET), \ "M" (address) \ : "r0", "r30", "r31" \ ); \ __result; \ })) #define boot_lock_fuse_bits_get(address) \ (__extension__({ \ uint8_t __result; \ __asm__ __volatile__ \ ( \ "ldi r30, %3\n\t" \ "ldi r31, 0\n\t" \ "sts %1, %2\n\t" \ "lpm %0, Z\n\t" \ : "=r" (__result) \ : "i" (_SFR_MEM_ADDR(__SPM_REG)), \ "r" ((uint8_t)__BOOT_LOCK_BITS_SET), \ "M" (address) \ : "r0", "r30", "r31" \ ); \ __result; \ })) /** \ingroup avr_boot \def boot_signature_byte_get(address) Read the Signature Row byte at \c address. For some MCU types, this function can also retrieve the factory-stored oscillator calibration bytes. Parameter \c address can be 0-0x1f as documented by the datasheet. \note The values are MCU type dependent. */ #define __BOOT_SIGROW_READ (_BV(__SPM_ENABLE) | _BV(SIGRD)) #define boot_signature_byte_get_short(addr) \ (__extension__({ \ uint16_t __addr16 = (uint16_t)(addr); \ uint8_t __result; \ __asm__ __volatile__ \ ( \ "out %1, %2\n\t" \ "lpm %0, Z" "\n\t" \ : "=r" (__result) \ : "i" (_SFR_IO_ADDR(__SPM_REG)), \ "r" ((uint8_t) __BOOT_SIGROW_READ), \ "z" (__addr16) \ ); \ __result; \ })) #define boot_signature_byte_get(addr) \ (__extension__({ \ uint16_t __addr16 = (uint16_t)(addr); \ uint8_t __result; \ __asm__ __volatile__ \ ( \ "sts %1, %2\n\t" \ "lpm %0, Z" "\n\t" \ : "=r" (__result) \ : "i" (_SFR_MEM_ADDR(__SPM_REG)), \ "r" ((uint8_t) __BOOT_SIGROW_READ), \ "z" (__addr16) \ ); \ __result; \ })) /** \ingroup avr_boot \def boot_page_fill(address, data) Fill the bootloader temporary page buffer for flash address with data word. \note The address is a byte address. The data is a word. The AVR writes data to the buffer a word at a time, but addresses the buffer per byte! So, increment your address by 2 between calls, and send 2 data bytes in a word format! The LSB of the data is written to the lower address; the MSB of the data is written to the higher address.*/ /** \ingroup avr_boot \def boot_page_erase(address) Erase the flash page that contains address. \note address is a byte address in flash, not a word address. */ /** \ingroup avr_boot \def boot_page_write(address) Write the bootloader temporary page buffer to flash page that contains address. \note address is a byte address in flash, not a word address. */ /** \ingroup avr_boot \def boot_rww_enable() Enable the Read-While-Write memory section. */ /** \ingroup avr_boot \def boot_lock_bits_set(lock_bits) Set the bootloader lock bits. \param lock_bits A mask of which Boot Loader Lock Bits to set. \note In this context, a 'set bit' will be written to a zero value. Note also that only BLBxx bits can be programmed by this command. For example, to disallow the SPM instruction from writing to the Boot Loader memory section of flash, you would use this macro as such: \code boot_lock_bits_set (_BV (BLB11)); \endcode \note Like any lock bits, the Boot Loader Lock Bits, once set, cannot be cleared again except by a chip erase which will in turn also erase the boot loader itself. */ /* Normal versions of the macros use 16-bit addresses. Extended versions of the macros use 32-bit addresses. Alternate versions of the macros use 16-bit addresses and require special instruction sequences after LPM. FLASHEND is defined in the ioXXXX.h file. USHRT_MAX is defined in . */ #if defined(__AVR_ATmega161__) || defined(__AVR_ATmega163__) \ || defined(__AVR_ATmega323__) /* Alternate: ATmega161/163/323 and 16 bit address */ #define boot_page_fill(address, data) __boot_page_fill_alternate(address, data) #define boot_page_erase(address) __boot_page_erase_alternate(address) #define boot_page_write(address) __boot_page_write_alternate(address) #define boot_rww_enable() __boot_rww_enable_alternate() #define boot_lock_bits_set(lock_bits) __boot_lock_bits_set_alternate(lock_bits) #elif (FLASHEND > USHRT_MAX) /* Extended: >16 bit address */ #define boot_page_fill(address, data) __boot_page_fill_extended_short(address, data) #define boot_page_erase(address) __boot_page_erase_extended_short(address) #define boot_page_write(address) __boot_page_write_extended_short(address) #define boot_rww_enable() __boot_rww_enable_short() #define boot_lock_bits_set(lock_bits) __boot_lock_bits_set_short(lock_bits) #else /* Normal: 16 bit address */ #define boot_page_fill(address, data) __boot_page_fill_short(address, data) #define boot_page_erase(address) __boot_page_erase_short(address) #define boot_page_write(address) __boot_page_write_short(address) #define boot_rww_enable() __boot_rww_enable_short() #define boot_lock_bits_set(lock_bits) __boot_lock_bits_set_short(lock_bits) #endif /** \ingroup avr_boot Same as boot_page_fill() except it waits for eeprom and spm operations to complete before filling the page. */ #define boot_page_fill_safe(address, data) \ do { \ boot_spm_busy_wait(); \ eeprom_busy_wait(); \ boot_page_fill(address, data); \ } while (0) /** \ingroup avr_boot Same as boot_page_erase() except it waits for eeprom and spm operations to complete before erasing the page. */ #define boot_page_erase_safe(address) \ do { \ boot_spm_busy_wait(); \ eeprom_busy_wait(); \ boot_page_erase (address); \ } while (0) /** \ingroup avr_boot Same as boot_page_write() except it waits for eeprom and spm operations to complete before writing the page. */ #define boot_page_write_safe(address) \ do { \ boot_spm_busy_wait(); \ eeprom_busy_wait(); \ boot_page_write (address); \ } while (0) /** \ingroup avr_boot Same as boot_rww_enable() except waits for eeprom and spm operations to complete before enabling the RWW mameory. */ #define boot_rww_enable_safe() \ do { \ boot_spm_busy_wait(); \ eeprom_busy_wait(); \ boot_rww_enable(); \ } while (0) /** \ingroup avr_boot Same as boot_lock_bits_set() except waits for eeprom and spm operations to complete before setting the lock bits. */ #define boot_lock_bits_set_safe(lock_bits) \ do { \ boot_spm_busy_wait(); \ eeprom_busy_wait(); \ boot_lock_bits_set (lock_bits); \ } while (0) #endif /* _AVR_BOOT_H_ */ mighty-1284p-1/bootloaders/optiboot/optiboot.c000066400000000000000000000605231237102241100214470ustar00rootroot00000000000000/**********************************************************/ /* Optiboot bootloader for Arduino */ /* */ /* http://optiboot.googlecode.com */ /* */ /* Arduino-maintained version : See README.TXT */ /* http://code.google.com/p/arduino/ */ /* */ /* Heavily optimised bootloader that is faster and */ /* smaller than the Arduino standard bootloader */ /* */ /* Enhancements: */ /* Fits in 512 bytes, saving 1.5K of code space */ /* Background page erasing speeds up programming */ /* Higher baud rate speeds up programming */ /* Written almost entirely in C */ /* Customisable timeout with accurate timeconstant */ /* Optional virtual UART. No hardware UART required. */ /* Optional virtual boot partition for devices without. */ /* */ /* What you lose: */ /* Implements a skeleton STK500 protocol which is */ /* missing several features including EEPROM */ /* programming and non-page-aligned writes */ /* High baud rate breaks compatibility with standard */ /* Arduino flash settings */ /* */ /* Fully supported: */ /* ATmega168 based devices (Diecimila etc) */ /* ATmega328P based devices (Duemilanove etc) */ /* */ /* Alpha test */ /* ATmega1280 based devices (Arduino Mega) */ /* */ /* Work in progress: */ /* ATmega644P based devices (Sanguino) */ /* ATtiny84 based devices (Luminet) */ /* */ /* Does not support: */ /* USB based devices (eg. Teensy) */ /* */ /* Assumptions: */ /* The code makes several assumptions that reduce the */ /* code size. They are all true after a hardware reset, */ /* but may not be true if the bootloader is called by */ /* other means or on other hardware. */ /* No interrupts can occur */ /* UART and Timer 1 are set to their reset state */ /* SP points to RAMEND */ /* */ /* Code builds on code, libraries and optimisations from: */ /* stk500boot.c by Jason P. Kyle */ /* Arduino bootloader http://arduino.cc */ /* Spiff's 1K bootloader http://spiffie.org/know/arduino_1k_bootloader/bootloader.shtml */ /* avr-libc project http://nongnu.org/avr-libc */ /* Adaboot http://www.ladyada.net/library/arduino/bootloader.html */ /* AVR305 Atmel Application Note */ /* */ /* This program is free software; you can redistribute it */ /* and/or modify it under the terms of the GNU General */ /* Public License as published by the Free Software */ /* Foundation; either version 2 of the License, or */ /* (at your option) any later version. */ /* */ /* This program is distributed in the hope that it will */ /* be useful, but WITHOUT ANY WARRANTY; without even the */ /* implied warranty of MERCHANTABILITY or FITNESS FOR A */ /* PARTICULAR PURPOSE. See the GNU General Public */ /* License for more details. */ /* */ /* You should have received a copy of the GNU General */ /* Public License along with this program; if not, write */ /* to the Free Software Foundation, Inc., */ /* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ /* */ /* Licence can be viewed at */ /* http://www.fsf.org/licenses/gpl.txt */ /* */ /**********************************************************/ /**********************************************************/ /* */ /* Optional defines: */ /* */ /**********************************************************/ /* */ /* BIG_BOOT: */ /* Build a 1k bootloader, not 512 bytes. This turns on */ /* extra functionality. */ /* */ /* BAUD_RATE: */ /* Set bootloader baud rate. */ /* */ /* LUDICROUS_SPEED: */ /* 230400 baud :-) */ /* */ /* SOFT_UART: */ /* Use AVR305 soft-UART instead of hardware UART. */ /* */ /* LED_START_FLASHES: */ /* Number of LED flashes on bootup. */ /* */ /* LED_DATA_FLASH: */ /* Flash LED when transferring data. For boards without */ /* TX or RX LEDs, or for people who like blinky lights. */ /* */ /* SUPPORT_EEPROM: */ /* Support reading and writing from EEPROM. This is not */ /* used by Arduino, so off by default. */ /* */ /* TIMEOUT_MS: */ /* Bootloader timeout period, in milliseconds. */ /* 500,1000,2000,4000,8000 supported. */ /* */ /**********************************************************/ /**********************************************************/ /* Version Numbers! */ /* */ /* Arduino Optiboot now includes this Version number in */ /* the source and object code. */ /* */ /* Version 3 was released as zip from the optiboot */ /* repository and was distributed with Arduino 0022. */ /* Version 4 starts with the arduino repository commit */ /* that brought the arduino repository up-to-date with */ /* the optiboot source tree changes since v3. */ /* */ /**********************************************************/ /**********************************************************/ /* Edit History: */ /* */ /* Jan 2012: */ /* 4.5 WestfW: fix NRWW value for m1284. */ /* 4.4 WestfW: use attribute OS_main instead of naked for */ /* main(). This allows optimizations that we */ /* count on, which are prohibited in naked */ /* functions due to PR42240. (keeps us less */ /* than 512 bytes when compiler is gcc4.5 */ /* (code from 4.3.2 remains the same.) */ /* 4.4 WestfW and Maniacbug: Add m1284 support. This */ /* does not change the 328 binary, so the */ /* version number didn't change either. (?) */ /* June 2011: */ /* 4.4 WestfW: remove automatic soft_uart detect (didn't */ /* know what it was doing or why.) Added a */ /* check of the calculated BRG value instead. */ /* Version stays 4.4; existing binaries are */ /* not changed. */ /* 4.4 WestfW: add initialization of address to keep */ /* the compiler happy. Change SC'ed targets. */ /* Return the SW version via READ PARAM */ /* 4.3 WestfW: catch framing errors in getch(), so that */ /* AVRISP works without HW kludges. */ /* http://code.google.com/p/arduino/issues/detail?id=368n*/ /* 4.2 WestfW: reduce code size, fix timeouts, change */ /* verifySpace to use WDT instead of appstart */ /* 4.1 WestfW: put version number in binary. */ /**********************************************************/ #define OPTIBOOT_MAJVER 4 #define OPTIBOOT_MINVER 5 #define MAKESTR(a) #a #define MAKEVER(a, b) MAKESTR(a*256+b) asm(" .section .version\n" "optiboot_version: .word " MAKEVER(OPTIBOOT_MAJVER, OPTIBOOT_MINVER) "\n" " .section .text\n"); #include #include #include // uses sts instructions, but this version uses out instructions // This saves cycles and program memory. #include "boot.h" // We don't use as those routines have interrupt overhead we don't need. #include "pin_defs.h" #include "stk500.h" #ifndef LED_START_FLASHES #define LED_START_FLASHES 0 #endif #ifdef LUDICROUS_SPEED #define BAUD_RATE 230400L #endif /* set the UART baud rate defaults */ #ifndef BAUD_RATE #if F_CPU >= 8000000L #define BAUD_RATE 115200L // Highest rate Avrdude win32 will support #elsif F_CPU >= 1000000L #define BAUD_RATE 9600L // 19200 also supported, but with significant error #elsif F_CPU >= 128000L #define BAUD_RATE 4800L // Good for 128kHz internal RC #else #define BAUD_RATE 1200L // Good even at 32768Hz #endif #endif #if 0 /* Switch in soft UART for hard baud rates */ /* * I don't understand what this was supposed to accomplish, where the * constant "280" came from, or why automatically (and perhaps unexpectedly) * switching to a soft uart is a good thing, so I'm undoing this in favor * of a range check using the same calc used to config the BRG... */ #if (F_CPU/BAUD_RATE) > 280 // > 57600 for 16MHz #ifndef SOFT_UART #define SOFT_UART #endif #endif #else // 0 #if (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 > 250 #error Unachievable baud rate (too slow) BAUD_RATE #endif // baud rate slow check #if (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 < 3 #error Unachievable baud rate (too fast) BAUD_RATE #endif // baud rate fastn check #endif /* Watchdog settings */ #define WATCHDOG_OFF (0) #define WATCHDOG_16MS (_BV(WDE)) #define WATCHDOG_32MS (_BV(WDP0) | _BV(WDE)) #define WATCHDOG_64MS (_BV(WDP1) | _BV(WDE)) #define WATCHDOG_125MS (_BV(WDP1) | _BV(WDP0) | _BV(WDE)) #define WATCHDOG_250MS (_BV(WDP2) | _BV(WDE)) #define WATCHDOG_500MS (_BV(WDP2) | _BV(WDP0) | _BV(WDE)) #define WATCHDOG_1S (_BV(WDP2) | _BV(WDP1) | _BV(WDE)) #define WATCHDOG_2S (_BV(WDP2) | _BV(WDP1) | _BV(WDP0) | _BV(WDE)) #ifndef __AVR_ATmega8__ #define WATCHDOG_4S (_BV(WDP3) | _BV(WDE)) #define WATCHDOG_8S (_BV(WDP3) | _BV(WDP0) | _BV(WDE)) #endif /* Function Prototypes */ /* The main function is in init9, which removes the interrupt vector table */ /* we don't need. It is also 'naked', which means the compiler does not */ /* generate any entry or exit code itself. */ int main(void) __attribute__ ((OS_main)) __attribute__ ((section (".init9"))); void putch(char); uint8_t getch(void); static inline void getNch(uint8_t); /* "static inline" is a compiler hint to reduce code size */ void verifySpace(); static inline void flash_led(uint8_t); uint8_t getLen(); static inline void watchdogReset(); void watchdogConfig(uint8_t x); #ifdef SOFT_UART void uartDelay() __attribute__ ((naked)); #endif void appStart() __attribute__ ((naked)); /* * NRWW memory * Addresses below NRWW (Non-Read-While-Write) can be programmed while * continuing to run code from flash, slightly speeding up programming * time. Beware that Atmel data sheets specify this as a WORD address, * while optiboot will be comparing against a 16-bit byte address. This * means that on a part with 128kB of memory, the upper part of the lower * 64k will get NRWW processing as well, even though it doesn't need it. * That's OK. In fact, you can disable the overlapping processing for * a part entirely by setting NRWWSTART to zero. This reduces code * space a bit, at the expense of being slightly slower, overall. * * RAMSTART should be self-explanatory. It's bigger on parts with a * lot of peripheral registers. */ #if defined(__AVR_ATmega168__) #define RAMSTART (0x100) #define NRWWSTART (0x3800) #elif defined(__AVR_ATmega328P__) #define RAMSTART (0x100) #define NRWWSTART (0x7000) #elif defined (__AVR_ATmega644P__) #define RAMSTART (0x100) #define NRWWSTART (0xE000) #elif defined (__AVR_ATmega1284P__) #define RAMSTART (0x100) #define NRWWSTART (0xE000) #elif defined(__AVR_ATtiny84__) #define RAMSTART (0x100) #define NRWWSTART (0x0000) #elif defined(__AVR_ATmega1280__) #define RAMSTART (0x200) #define NRWWSTART (0xE000) #elif defined(__AVR_ATmega8__) || defined(__AVR_ATmega88__) #define RAMSTART (0x100) #define NRWWSTART (0x1800) #endif /* C zero initialises all global variables. However, that requires */ /* These definitions are NOT zero initialised, but that doesn't matter */ /* This allows us to drop the zero init code, saving us memory */ #define buff ((uint8_t*)(RAMSTART)) #ifdef VIRTUAL_BOOT_PARTITION #define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4)) #define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6)) #endif /* main program starts here */ int main(void) { uint8_t ch; /* * Making these local and in registers prevents the need for initializing * them, and also saves space because code no longer stores to memory. * (initializing address keeps the compiler happy, but isn't really * necessary, and uses 4 bytes of flash.) */ register uint16_t address = 0; register uint8_t length; // After the zero init loop, this is the first code to run. // // This code makes the following assumptions: // No interrupts will execute // SP points to RAMEND // r1 contains zero // // If not, uncomment the following instructions: // cli(); asm volatile ("clr __zero_reg__"); #ifdef __AVR_ATmega8__ SP=RAMEND; // This is done by hardware reset #endif // Adaboot no-wait mod ch = MCUSR; MCUSR = 0; if (!(ch & _BV(EXTRF))) appStart(); #if LED_START_FLASHES > 0 // Set up Timer 1 for timeout counter TCCR1B = _BV(CS12) | _BV(CS10); // div 1024 #endif #ifndef SOFT_UART #ifdef __AVR_ATmega8__ UCSRA = _BV(U2X); //Double speed mode USART UCSRB = _BV(RXEN) | _BV(TXEN); // enable Rx & Tx UCSRC = _BV(URSEL) | _BV(UCSZ1) | _BV(UCSZ0); // config USART; 8N1 UBRRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 ); #else UCSR0A = _BV(U2X0); //Double speed mode USART0 UCSR0B = _BV(RXEN0) | _BV(TXEN0); UCSR0C = _BV(UCSZ00) | _BV(UCSZ01); UBRR0L = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 ); #endif #endif // Set up watchdog to trigger after 500ms watchdogConfig(WATCHDOG_1S); /* Set LED pin as output */ LED_DDR |= _BV(LED); #ifdef SOFT_UART /* Set TX pin as output */ UART_DDR |= _BV(UART_TX_BIT); #endif #if LED_START_FLASHES > 0 /* Flash onboard LED to signal entering of bootloader */ flash_led(LED_START_FLASHES * 2); #endif /* Forever loop */ for (;;) { /* get character from UART */ ch = getch(); if(ch == STK_GET_PARAMETER) { unsigned char which = getch(); verifySpace(); if (which == 0x82) { /* * Send optiboot version as "minor SW version" */ putch(OPTIBOOT_MINVER); } else if (which == 0x81) { putch(OPTIBOOT_MAJVER); } else { /* * GET PARAMETER returns a generic 0x03 reply for * other parameters - enough to keep Avrdude happy */ putch(0x03); } } else if(ch == STK_SET_DEVICE) { // SET DEVICE is ignored getNch(20); } else if(ch == STK_SET_DEVICE_EXT) { // SET DEVICE EXT is ignored getNch(5); } else if(ch == STK_LOAD_ADDRESS) { // LOAD ADDRESS uint16_t newAddress; newAddress = getch(); newAddress = (newAddress & 0xff) | (getch() << 8); #ifdef RAMPZ // Transfer top bit to RAMPZ RAMPZ = (newAddress & 0x8000) ? 1 : 0; #endif newAddress += newAddress; // Convert from word address to byte address address = newAddress; verifySpace(); } else if(ch == STK_UNIVERSAL) { // UNIVERSAL command is ignored getNch(4); putch(0x00); } /* Write memory, length is big endian and is in bytes */ else if(ch == STK_PROG_PAGE) { // PROGRAM PAGE - we support flash programming only, not EEPROM uint8_t *bufPtr; uint16_t addrPtr; getch(); /* getlen() */ length = getch(); getch(); // If we are in RWW section, immediately start page erase if (address < NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address); // While that is going on, read in page contents bufPtr = buff; do *bufPtr++ = getch(); while (--length); // If we are in NRWW section, page erase has to be delayed until now. // Todo: Take RAMPZ into account if (address >= NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address); // Read command terminator, start reply verifySpace(); // If only a partial page is to be programmed, the erase might not be complete. // So check that here boot_spm_busy_wait(); #ifdef VIRTUAL_BOOT_PARTITION if ((uint16_t)(void*)address == 0) { // This is the reset vector page. We need to live-patch the code so the // bootloader runs. // // Move RESET vector to WDT vector uint16_t vect = buff[0] | (buff[1]<<8); rstVect = vect; wdtVect = buff[8] | (buff[9]<<8); vect -= 4; // Instruction is a relative jump (rjmp), so recalculate. buff[8] = vect & 0xff; buff[9] = vect >> 8; // Add jump to bootloader at RESET vector buff[0] = 0x7f; buff[1] = 0xce; // rjmp 0x1d00 instruction } #endif // Copy buffer into programming buffer bufPtr = buff; addrPtr = (uint16_t)(void*)address; ch = SPM_PAGESIZE / 2; do { uint16_t a; a = *bufPtr++; a |= (*bufPtr++) << 8; __boot_page_fill_short((uint16_t)(void*)addrPtr,a); addrPtr += 2; } while (--ch); // Write from programming buffer __boot_page_write_short((uint16_t)(void*)address); boot_spm_busy_wait(); #if defined(RWWSRE) // Reenable read access to flash boot_rww_enable(); #endif } /* Read memory block mode, length is big endian. */ else if(ch == STK_READ_PAGE) { // READ PAGE - we only read flash getch(); /* getlen() */ length = getch(); getch(); verifySpace(); #ifdef VIRTUAL_BOOT_PARTITION do { // Undo vector patch in bottom page so verify passes if (address == 0) ch=rstVect & 0xff; else if (address == 1) ch=rstVect >> 8; else if (address == 8) ch=wdtVect & 0xff; else if (address == 9) ch=wdtVect >> 8; else ch = pgm_read_byte_near(address); address++; putch(ch); } while (--length); #else #ifdef RAMPZ // Since RAMPZ should already be set, we need to use EPLM directly. // do putch(pgm_read_byte_near(address++)); // while (--length); do { uint8_t result; __asm__ ("elpm %0,Z\n":"=r"(result):"z"(address)); putch(result); address++; } while (--length); #else do putch(pgm_read_byte_near(address++)); while (--length); #endif #endif } /* Get device signature bytes */ else if(ch == STK_READ_SIGN) { // READ SIGN - return what Avrdude wants to hear verifySpace(); putch(SIGNATURE_0); putch(SIGNATURE_1); putch(SIGNATURE_2); } else if (ch == STK_LEAVE_PROGMODE) { /* 'Q' */ // Adaboot no-wait mod watchdogConfig(WATCHDOG_16MS); verifySpace(); } else { // This covers the response to commands like STK_ENTER_PROGMODE verifySpace(); } putch(STK_OK); } } void putch(char ch) { #ifndef SOFT_UART while (!(UCSR0A & _BV(UDRE0))); UDR0 = ch; #else __asm__ __volatile__ ( " com %[ch]\n" // ones complement, carry set " sec\n" "1: brcc 2f\n" " cbi %[uartPort],%[uartBit]\n" " rjmp 3f\n" "2: sbi %[uartPort],%[uartBit]\n" " nop\n" "3: rcall uartDelay\n" " rcall uartDelay\n" " lsr %[ch]\n" " dec %[bitcnt]\n" " brne 1b\n" : : [bitcnt] "d" (10), [ch] "r" (ch), [uartPort] "I" (_SFR_IO_ADDR(UART_PORT)), [uartBit] "I" (UART_TX_BIT) : "r25" ); #endif } uint8_t getch(void) { uint8_t ch; #ifdef LED_DATA_FLASH #ifdef __AVR_ATmega8__ LED_PORT ^= _BV(LED); #else LED_PIN |= _BV(LED); #endif #endif #ifdef SOFT_UART __asm__ __volatile__ ( "1: sbic %[uartPin],%[uartBit]\n" // Wait for start edge " rjmp 1b\n" " rcall uartDelay\n" // Get to middle of start bit "2: rcall uartDelay\n" // Wait 1 bit period " rcall uartDelay\n" // Wait 1 bit period " clc\n" " sbic %[uartPin],%[uartBit]\n" " sec\n" " dec %[bitCnt]\n" " breq 3f\n" " ror %[ch]\n" " rjmp 2b\n" "3:\n" : [ch] "=r" (ch) : [bitCnt] "d" (9), [uartPin] "I" (_SFR_IO_ADDR(UART_PIN)), [uartBit] "I" (UART_RX_BIT) : "r25" ); #else while(!(UCSR0A & _BV(RXC0))) ; if (!(UCSR0A & _BV(FE0))) { /* * A Framing Error indicates (probably) that something is talking * to us at the wrong bit rate. Assume that this is because it * expects to be talking to the application, and DON'T reset the * watchdog. This should cause the bootloader to abort and run * the application "soon", if it keeps happening. (Note that we * don't care that an invalid char is returned...) */ watchdogReset(); } ch = UDR0; #endif #ifdef LED_DATA_FLASH #ifdef __AVR_ATmega8__ LED_PORT ^= _BV(LED); #else LED_PIN |= _BV(LED); #endif #endif return ch; } #ifdef SOFT_UART // AVR305 equation: #define UART_B_VALUE (((F_CPU/BAUD_RATE)-23)/6) // Adding 3 to numerator simulates nearest rounding for more accurate baud rates #define UART_B_VALUE (((F_CPU/BAUD_RATE)-20)/6) #if UART_B_VALUE > 255 #error Baud rate too slow for soft UART #endif void uartDelay() { __asm__ __volatile__ ( "ldi r25,%[count]\n" "1:dec r25\n" "brne 1b\n" "ret\n" ::[count] "M" (UART_B_VALUE) ); } #endif void getNch(uint8_t count) { do getch(); while (--count); verifySpace(); } void verifySpace() { if (getch() != CRC_EOP) { watchdogConfig(WATCHDOG_16MS); // shorten WD timeout while (1) // and busy-loop so that WD causes ; // a reset and app start. } putch(STK_INSYNC); } #if LED_START_FLASHES > 0 void flash_led(uint8_t count) { do { TCNT1 = -(F_CPU/(1024*16)); TIFR1 = _BV(TOV1); while(!(TIFR1 & _BV(TOV1))); #ifdef __AVR_ATmega8__ LED_PORT ^= _BV(LED); #else LED_PIN |= _BV(LED); #endif watchdogReset(); } while (--count); } #endif // Watchdog functions. These are only safe with interrupts turned off. void watchdogReset() { __asm__ __volatile__ ( "wdr\n" ); } void watchdogConfig(uint8_t x) { WDTCSR = _BV(WDCE) | _BV(WDE); WDTCSR = x; } void appStart() { watchdogConfig(WATCHDOG_OFF); __asm__ __volatile__ ( #ifdef VIRTUAL_BOOT_PARTITION // Jump to WDT vector "ldi r30,4\n" "clr r31\n" #else // Jump to RST vector "clr r30\n" "clr r31\n" #endif "ijmp\n" ); } mighty-1284p-1/bootloaders/optiboot/pin_defs.h000066400000000000000000000036541237102241100214060ustar00rootroot00000000000000#if defined(__AVR_ATmega168__) || defined(__AVR_ATmega328P__) || defined(__AVR_ATmega88) || defined(__AVR_ATmega8__) || defined(__AVR_ATmega88__) /* Onboard LED is connected to pin PB5 in Arduino NG, Diecimila, and Duemilanove */ #define LED_DDR DDRB #define LED_PORT PORTB #define LED_PIN PINB #define LED PINB5 /* Ports for soft UART */ #ifdef SOFT_UART #define UART_PORT PORTD #define UART_PIN PIND #define UART_DDR DDRD #define UART_TX_BIT 1 #define UART_RX_BIT 0 #endif #endif #if defined(__AVR_ATmega8__) //Name conversion R.Wiersma #define UCSR0A UCSRA #define UDR0 UDR #define UDRE0 UDRE #define RXC0 RXC #define FE0 FE #define TIFR1 TIFR #define WDTCSR WDTCR #endif /* Luminet support */ #if defined(__AVR_ATtiny84__) /* Red LED is connected to pin PA4 */ #define LED_DDR DDRA #define LED_PORT PORTA #define LED_PIN PINA #define LED PINA4 /* Ports for soft UART - left port only for now. TX/RX on PA2/PA3 */ #ifdef SOFT_UART #define UART_PORT PORTA #define UART_PIN PINA #define UART_DDR DDRA #define UART_TX_BIT 2 #define UART_RX_BIT 3 #endif #endif /* Sanguino support */ #if defined(__AVR_ATmega644P__) || defined(__AVR_ATmega1284P__) /* Onboard LED is connected to pin PB0 on Sanguino */ #define LED_DDR DDRB #define LED_PORT PORTB #define LED_PIN PINB #define LED PINB1 /* Ports for soft UART */ #ifdef SOFT_UART #define UART_PORT PORTD #define UART_PIN PIND #define UART_DDR DDRD #define UART_TX_BIT 1 #define UART_RX_BIT 0 #endif #endif /* Mega support */ #if defined(__AVR_ATmega1280__) /* Onboard LED is connected to pin PB7 on Arduino Mega */ #define LED_DDR DDRB #define LED_PORT PORTB #define LED_PIN PINB #define LED PINB7 /* Ports for soft UART */ #ifdef SOFT_UART #define UART_PORT PORTE #define UART_PIN PINE #define UART_DDR DDRE #define UART_TX_BIT 1 #define UART_RX_BIT 0 #endif #endif mighty-1284p-1/bootloaders/optiboot/stk500.h000066400000000000000000000031441237102241100206370ustar00rootroot00000000000000/* STK500 constants list, from AVRDUDE */ #define STK_OK 0x10 #define STK_FAILED 0x11 // Not used #define STK_UNKNOWN 0x12 // Not used #define STK_NODEVICE 0x13 // Not used #define STK_INSYNC 0x14 // ' ' #define STK_NOSYNC 0x15 // Not used #define ADC_CHANNEL_ERROR 0x16 // Not used #define ADC_MEASURE_OK 0x17 // Not used #define PWM_CHANNEL_ERROR 0x18 // Not used #define PWM_ADJUST_OK 0x19 // Not used #define CRC_EOP 0x20 // 'SPACE' #define STK_GET_SYNC 0x30 // '0' #define STK_GET_SIGN_ON 0x31 // '1' #define STK_SET_PARAMETER 0x40 // '@' #define STK_GET_PARAMETER 0x41 // 'A' #define STK_SET_DEVICE 0x42 // 'B' #define STK_SET_DEVICE_EXT 0x45 // 'E' #define STK_ENTER_PROGMODE 0x50 // 'P' #define STK_LEAVE_PROGMODE 0x51 // 'Q' #define STK_CHIP_ERASE 0x52 // 'R' #define STK_CHECK_AUTOINC 0x53 // 'S' #define STK_LOAD_ADDRESS 0x55 // 'U' #define STK_UNIVERSAL 0x56 // 'V' #define STK_PROG_FLASH 0x60 // '`' #define STK_PROG_DATA 0x61 // 'a' #define STK_PROG_FUSE 0x62 // 'b' #define STK_PROG_LOCK 0x63 // 'c' #define STK_PROG_PAGE 0x64 // 'd' #define STK_PROG_FUSE_EXT 0x65 // 'e' #define STK_READ_FLASH 0x70 // 'p' #define STK_READ_DATA 0x71 // 'q' #define STK_READ_FUSE 0x72 // 'r' #define STK_READ_LOCK 0x73 // 's' #define STK_READ_PAGE 0x74 // 't' #define STK_READ_SIGN 0x75 // 'u' #define STK_READ_OSCCAL 0x76 // 'v' #define STK_READ_FUSE_EXT 0x77 // 'w' #define STK_READ_OSCCAL_EXT 0x78 // 'x' mighty-1284p-1/bootloaders/standard/000077500000000000000000000000001237102241100173775ustar00rootroot00000000000000mighty-1284p-1/bootloaders/standard/ATmegaBOOT.c000066400000000000000000000765361237102241100214060ustar00rootroot00000000000000/**********************************************************/ /* Serial Bootloader for Atmel megaAVR Controllers */ /* */ /* tested with ATmega8, ATmega128 and ATmega168 */ /* should work with other mega's, see code for details */ /* */ /* ATmegaBOOT.c */ /* */ /* */ /* 20090308: integrated Mega changes into main bootloader */ /* source by D. Mellis */ /* 20080930: hacked for Arduino Mega (with the 1280 */ /* processor, backwards compatible) */ /* by D. Cuartielles */ /* 20070626: hacked for Arduino Diecimila (which auto- */ /* resets when a USB connection is made to it) */ /* by D. Mellis */ /* 20060802: hacked for Arduino by D. Cuartielles */ /* based on a previous hack by D. Mellis */ /* and D. Cuartielles */ /* */ /* Monitor and debug functions were added to the original */ /* code by Dr. Erik Lins, chip45.com. (See below) */ /* */ /* Thanks to Karl Pitrich for fixing a bootloader pin */ /* problem and more informative LED blinking! */ /* */ /* For the latest version see: */ /* http://www.chip45.com/ */ /* */ /* ------------------------------------------------------ */ /* */ /* based on stk500boot.c */ /* Copyright (c) 2003, Jason P. Kyle */ /* All rights reserved. */ /* see avr1.org for original file and information */ /* */ /* This program is free software; you can redistribute it */ /* and/or modify it under the terms of the GNU General */ /* Public License as published by the Free Software */ /* Foundation; either version 2 of the License, or */ /* (at your option) any later version. */ /* */ /* This program is distributed in the hope that it will */ /* be useful, but WITHOUT ANY WARRANTY; without even the */ /* implied warranty of MERCHANTABILITY or FITNESS FOR A */ /* PARTICULAR PURPOSE. See the GNU General Public */ /* License for more details. */ /* */ /* You should have received a copy of the GNU General */ /* Public License along with this program; if not, write */ /* to the Free Software Foundation, Inc., */ /* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ /* */ /* Licence can be viewed at */ /* http://www.fsf.org/licenses/gpl.txt */ /* */ /* Target = Atmel AVR m128,m64,m32,m16,m8,m162,m163,m169, */ /* m8515,m8535. ATmega161 has a very small boot block so */ /* isn't supported. */ /* */ /* Tested with m168 */ /**********************************************************/ /* $Id$ */ /* some includes */ #include #include #include #include #include #include /* the current avr-libc eeprom functions do not support the ATmega168 */ /* own eeprom write/read functions are used instead */ #if !defined(__AVR_ATmega168__) || !defined(__AVR_ATmega328P__) #include #endif /* Use the F_CPU defined in Makefile */ /* 20060803: hacked by DojoCorp */ /* 20070626: hacked by David A. Mellis to decrease waiting time for auto-reset */ /* set the waiting time for the bootloader */ /* get this from the Makefile instead */ /* #define MAX_TIME_COUNT (F_CPU>>4) */ /* 20070707: hacked by David A. Mellis - after this many errors give up and launch application */ #define MAX_ERROR_COUNT 5 #define NUM_LED_FLASHES 3 /* set the UART baud rate */ /* 20060803: hacked by DojoCorp */ //#define BAUD_RATE 115200 #ifndef BAUD_RATE #define BAUD_RATE 19200 #endif /* SW_MAJOR and MINOR needs to be updated from time to time to avoid warning message from AVR Studio */ /* never allow AVR Studio to do an update !!!! */ #define HW_VER 0x02 #define SW_MAJOR 0x01 #define SW_MINOR 0x10 /* Adjust to suit whatever pin your hardware uses to enter the bootloader */ /* ATmega128 has two UARTS so two pins are used to enter bootloader and select UART */ /* ATmega1280 has four UARTS, but for Arduino Mega, we will only use RXD0 to get code */ /* BL0... means UART0, BL1... means UART1 */ #ifdef __AVR_ATmega128__ #define BL_DDR DDRF #define BL_PORT PORTF #define BL_PIN PINF #define BL0 PINF7 #define BL1 PINF6 #elif defined __AVR_ATmega1280__ /* we just don't do anything for the MEGA and enter bootloader on reset anyway*/ #elif defined __AVR_ATmega1284P__ #else /* other ATmegas have only one UART, so only one pin is defined to enter bootloader */ #define BL_DDR DDRD #define BL_PORT PORTD #define BL_PIN PIND #define BL PIND6 #endif /* onboard LED is used to indicate, that the bootloader was entered (3x flashing) */ /* if monitor functions are included, LED goes on after monitor was entered */ #if defined __AVR_ATmega128__ || defined __AVR_ATmega1280__ /* Onboard LED is connected to pin PB7 (e.g. Crumb128, PROBOmega128, Savvy128, Arduino Mega) */ #define LED_DDR DDRB #define LED_PORT PORTB #define LED_PIN PINB #define LED PINB7 #elif defined __AVR_ATmega1284P__ #define LED_DDR DDRB #define LED_PORT PORTB #define LED_PIN PINB #define LED PINB0 #else /* Onboard LED is connected to pin PB5 in Arduino NG, Diecimila, and Duomilanuove */ /* other boards like e.g. Crumb8, Crumb168 are using PB2 */ #define LED_DDR DDRB #define LED_PORT PORTB #define LED_PIN PINB #define LED PINB5 #endif /* monitor functions will only be compiled when using ATmega128, due to bootblock size constraints */ #if defined(__AVR_ATmega128__) || defined(__AVR_ATmega1280__) #define MONITOR 1 #endif /* define various device id's */ /* manufacturer byte is always the same */ #define SIG1 0x1E // Yep, Atmel is the only manufacturer of AVR micros. Single source :( #if defined __AVR_ATmega1280__ #define SIG2 0x97 #define SIG3 0x03 #define PAGE_SIZE 0x80U //128 words #elif defined __AVR_ATmega1284P__ #define SIG2 0x97 #define SIG3 0x05 #define PAGE_SIZE 0x080U //128 words #elif defined __AVR_ATmega1281__ #define SIG2 0x97 #define SIG3 0x04 #define PAGE_SIZE 0x80U //128 words #elif defined __AVR_ATmega128__ #define SIG2 0x97 #define SIG3 0x02 #define PAGE_SIZE 0x80U //128 words #elif defined __AVR_ATmega64__ #define SIG2 0x96 #define SIG3 0x02 #define PAGE_SIZE 0x80U //128 words #elif defined __AVR_ATmega32__ #define SIG2 0x95 #define SIG3 0x02 #define PAGE_SIZE 0x40U //64 words #elif defined __AVR_ATmega16__ #define SIG2 0x94 #define SIG3 0x03 #define PAGE_SIZE 0x40U //64 words #elif defined __AVR_ATmega8__ #define SIG2 0x93 #define SIG3 0x07 #define PAGE_SIZE 0x20U //32 words #elif defined __AVR_ATmega88__ #define SIG2 0x93 #define SIG3 0x0a #define PAGE_SIZE 0x20U //32 words #elif defined __AVR_ATmega168__ #define SIG2 0x94 #define SIG3 0x06 #define PAGE_SIZE 0x40U //64 words #elif defined __AVR_ATmega328P__ #define SIG2 0x95 #define SIG3 0x0F #define PAGE_SIZE 0x40U //64 words #elif defined __AVR_ATmega162__ #define SIG2 0x94 #define SIG3 0x04 #define PAGE_SIZE 0x40U //64 words #elif defined __AVR_ATmega163__ #define SIG2 0x94 #define SIG3 0x02 #define PAGE_SIZE 0x40U //64 words #elif defined __AVR_ATmega169__ #define SIG2 0x94 #define SIG3 0x05 #define PAGE_SIZE 0x40U //64 words #elif defined __AVR_ATmega8515__ #define SIG2 0x93 #define SIG3 0x06 #define PAGE_SIZE 0x20U //32 words #elif defined __AVR_ATmega8535__ #define SIG2 0x93 #define SIG3 0x08 #define PAGE_SIZE 0x20U //32 words #endif /* function prototypes */ void putch(char); char getch(void); void getNch(uint8_t); void byte_response(uint8_t); void nothing_response(void); char gethex(void); void puthex(char); void flash_led(uint8_t); /* some variables */ union address_union { uint16_t word; uint8_t byte[2]; } address; union length_union { uint16_t word; uint8_t byte[2]; } length; struct flags_struct { unsigned eeprom : 1; unsigned rampz : 1; } flags; uint8_t buff[256]; uint8_t address_high; uint8_t pagesz=0x80; uint8_t i; uint8_t bootuart = 0; uint8_t error_count = 0; void (*app_start)(void) = 0x0000; /* main program starts here */ int main(void) { uint8_t ch,ch2; uint16_t w; #ifdef WATCHDOG_MODS ch = MCUSR; MCUSR = 0; WDTCSR |= _BV(WDCE) | _BV(WDE); WDTCSR = 0; // Check if the WDT was used to reset, in which case we dont bootload and skip straight to the code. woot. if (! (ch & _BV(EXTRF))) // if its a not an external reset... app_start(); // skip bootloader #else asm volatile("nop\n\t"); #endif /* set pin direction for bootloader pin and enable pullup */ /* for ATmega128, two pins need to be initialized */ #ifdef __AVR_ATmega128__ BL_DDR &= ~_BV(BL0); BL_DDR &= ~_BV(BL1); BL_PORT |= _BV(BL0); BL_PORT |= _BV(BL1); #else /* We run the bootloader regardless of the state of this pin. Thus, don't put it in a different state than the other pins. --DAM, 070709 This also applies to Arduino Mega -- DC, 080930 BL_DDR &= ~_BV(BL); BL_PORT |= _BV(BL); */ #endif #ifdef __AVR_ATmega128__ /* check which UART should be used for booting */ if(bit_is_clear(BL_PIN, BL0)) { bootuart = 1; } else if(bit_is_clear(BL_PIN, BL1)) { bootuart = 2; } #endif #if defined __AVR_ATmega1280__ || defined __AVR_ATmega1284P__ /* the mega1280 chip has four serial ports ... we could eventually use any of them, or not? */ /* however, we don't wanna confuse people, to avoid making a mess, we will stick to RXD0, TXD0 */ bootuart = 1; #endif /* check if flash is programmed already, if not start bootloader anyway */ if(pgm_read_byte_near(0x0000) != 0xFF) { #ifdef __AVR_ATmega128__ /* no UART was selected, start application */ if(!bootuart) { app_start(); } #else /* check if bootloader pin is set low */ /* we don't start this part neither for the m8, nor m168 */ //if(bit_is_set(BL_PIN, BL)) { // app_start(); // } #endif } #ifdef __AVR_ATmega128__ /* no bootuart was selected, default to uart 0 */ if(!bootuart) { bootuart = 1; } #endif /* initialize UART(s) depending on CPU defined */ #if defined(__AVR_ATmega128__) || defined(__AVR_ATmega1280__) || defined(__AVR_ATmega1284P__) if(bootuart == 1) { UBRR0L = (uint8_t)(F_CPU/(BAUD_RATE*16L)-1); UBRR0H = (F_CPU/(BAUD_RATE*16L)-1) >> 8; UCSR0A = 0x00; UCSR0C = 0x06; UCSR0B = _BV(TXEN0)|_BV(RXEN0); } if(bootuart == 2) { UBRR1L = (uint8_t)(F_CPU/(BAUD_RATE*16L)-1); UBRR1H = (F_CPU/(BAUD_RATE*16L)-1) >> 8; UCSR1A = 0x00; UCSR1C = 0x06; UCSR1B = _BV(TXEN1)|_BV(RXEN1); } #elif defined __AVR_ATmega163__ UBRR = (uint8_t)(F_CPU/(BAUD_RATE*16L)-1); UBRRHI = (F_CPU/(BAUD_RATE*16L)-1) >> 8; UCSRA = 0x00; UCSRB = _BV(TXEN)|_BV(RXEN); #elif defined(__AVR_ATmega168__) || defined(__AVR_ATmega328P__) #ifdef DOUBLE_SPEED UCSR0A = (1<> 8; #else UBRR0L = (uint8_t)(F_CPU/(BAUD_RATE*16L)-1); UBRR0H = (F_CPU/(BAUD_RATE*16L)-1) >> 8; #endif UCSR0B = (1<>8; // set baud rate UBRRL = (((F_CPU/BAUD_RATE)/16)-1); UCSRB = (1<> 8; UCSRA = 0x00; UCSRC = 0x06; UCSRB = _BV(TXEN)|_BV(RXEN); #endif #if defined __AVR_ATmega1280__ /* Enable internal pull-up resistor on pin D0 (RX), in order to supress line noise that prevents the bootloader from timing out (DAM: 20070509) */ /* feature added to the Arduino Mega --DC: 080930 */ DDRE &= ~_BV(PINE0); PORTE |= _BV(PINE0); #endif /* set LED pin as output */ LED_DDR |= _BV(LED); /* flash onboard LED to signal entering of bootloader */ #if defined(__AVR_ATmega128__) || defined(__AVR_ATmega1280__) || defined(__AVR_ATmega1284P__) // 4x for UART0, 5x for UART1 flash_led(NUM_LED_FLASHES + bootuart); #else flash_led(NUM_LED_FLASHES); #endif /* 20050803: by DojoCorp, this is one of the parts provoking the system to stop listening, cancelled from the original */ //putch('\0'); /* forever loop */ for (;;) { /* get character from UART */ ch = getch(); /* A bunch of if...else if... gives smaller code than switch...case ! */ /* Hello is anyone home ? */ if(ch=='0') { nothing_response(); } /* Request programmer ID */ /* Not using PROGMEM string due to boot block in m128 being beyond 64kB boundry */ /* Would need to selectively manipulate RAMPZ, and it's only 9 characters anyway so who cares. */ else if(ch=='1') { if (getch() == ' ') { putch(0x14); putch('A'); putch('V'); putch('R'); putch(' '); putch('I'); putch('S'); putch('P'); putch(0x10); } else { if (++error_count == MAX_ERROR_COUNT) app_start(); } } /* AVR ISP/STK500 board commands DON'T CARE so default nothing_response */ else if(ch=='@') { ch2 = getch(); if (ch2>0x85) getch(); nothing_response(); } /* AVR ISP/STK500 board requests */ else if(ch=='A') { ch2 = getch(); if(ch2==0x80) byte_response(HW_VER); // Hardware version else if(ch2==0x81) byte_response(SW_MAJOR); // Software major version else if(ch2==0x82) byte_response(SW_MINOR); // Software minor version else if(ch2==0x98) byte_response(0x03); // Unknown but seems to be required by avr studio 3.56 else byte_response(0x00); // Covers various unnecessary responses we don't care about } /* Device Parameters DON'T CARE, DEVICE IS FIXED */ else if(ch=='B') { getNch(20); nothing_response(); } /* Parallel programming stuff DON'T CARE */ else if(ch=='E') { getNch(5); nothing_response(); } /* P: Enter programming mode */ /* R: Erase device, don't care as we will erase one page at a time anyway. */ else if(ch=='P' || ch=='R') { nothing_response(); } /* Leave programming mode */ else if(ch=='Q') { nothing_response(); #ifdef WATCHDOG_MODS // autoreset via watchdog (sneaky!) WDTCSR = _BV(WDE); while (1); // 16 ms #endif } /* Set address, little endian. EEPROM in bytes, FLASH in words */ /* Perhaps extra address bytes may be added in future to support > 128kB FLASH. */ /* This might explain why little endian was used here, big endian used everywhere else. */ else if(ch=='U') { address.byte[0] = getch(); address.byte[1] = getch(); nothing_response(); } /* Universal SPI programming command, disabled. Would be used for fuses and lock bits. */ else if(ch=='V') { if (getch() == 0x30) { getch(); ch = getch(); getch(); if (ch == 0) { byte_response(SIG1); } else if (ch == 1) { byte_response(SIG2); } else { byte_response(SIG3); } } else { getNch(3); byte_response(0x00); } } /* Write memory, length is big endian and is in bytes */ else if(ch=='d') { length.byte[1] = getch(); length.byte[0] = getch(); flags.eeprom = 0; if (getch() == 'E') flags.eeprom = 1; for (w=0; w127) address_high = 0x01; //Only possible with m128, m256 will need 3rd address byte. FIXME else address_high = 0x00; #if defined(__AVR_ATmega128__) || defined(__AVR_ATmega1280__) || defined(__AVR_ATmega1281__) || defined(__AVR_ATmega1284P__) RAMPZ = address_high; #endif address.word = address.word << 1; //address * 2 -> byte location /* if ((length.byte[0] & 0x01) == 0x01) length.word++; //Even up an odd number of bytes */ if ((length.byte[0] & 0x01)) length.word++; //Even up an odd number of bytes cli(); //Disable interrupts, just to be sure #if defined(__AVR_ATmega1280__) || defined(__AVR_ATmega1281__) || defined(__AVR_ATmega1284P__) while(bit_is_set(EECR,EEPE)); //Wait for previous EEPROM writes to complete #else while(bit_is_set(EECR,EEWE)); //Wait for previous EEPROM writes to complete #endif asm volatile( "clr r17 \n\t" //page_word_count "lds r30,address \n\t" //Address of FLASH location (in bytes) "lds r31,address+1 \n\t" "ldi r28,lo8(buff) \n\t" //Start of buffer array in RAM "ldi r29,hi8(buff) \n\t" "lds r24,length \n\t" //Length of data to be written (in bytes) "lds r25,length+1 \n\t" "length_loop: \n\t" //Main loop, repeat for number of words in block "cpi r17,0x00 \n\t" //If page_word_count=0 then erase page "brne no_page_erase \n\t" "wait_spm1: \n\t" "lds r16,%0 \n\t" //Wait for previous spm to complete "andi r16,1 \n\t" "cpi r16,1 \n\t" "breq wait_spm1 \n\t" "ldi r16,0x03 \n\t" //Erase page pointed to by Z "sts %0,r16 \n\t" "spm \n\t" #ifdef __AVR_ATmega163__ ".word 0xFFFF \n\t" "nop \n\t" #endif "wait_spm2: \n\t" "lds r16,%0 \n\t" //Wait for previous spm to complete "andi r16,1 \n\t" "cpi r16,1 \n\t" "breq wait_spm2 \n\t" "ldi r16,0x11 \n\t" //Re-enable RWW section "sts %0,r16 \n\t" "spm \n\t" #ifdef __AVR_ATmega163__ ".word 0xFFFF \n\t" "nop \n\t" #endif "no_page_erase: \n\t" "ld r0,Y+ \n\t" //Write 2 bytes into page buffer "ld r1,Y+ \n\t" "wait_spm3: \n\t" "lds r16,%0 \n\t" //Wait for previous spm to complete "andi r16,1 \n\t" "cpi r16,1 \n\t" "breq wait_spm3 \n\t" "ldi r16,0x01 \n\t" //Load r0,r1 into FLASH page buffer "sts %0,r16 \n\t" "spm \n\t" "inc r17 \n\t" //page_word_count++ "cpi r17,%1 \n\t" "brlo same_page \n\t" //Still same page in FLASH "write_page: \n\t" "clr r17 \n\t" //New page, write current one first "wait_spm4: \n\t" "lds r16,%0 \n\t" //Wait for previous spm to complete "andi r16,1 \n\t" "cpi r16,1 \n\t" "breq wait_spm4 \n\t" #ifdef __AVR_ATmega163__ "andi r30,0x80 \n\t" // m163 requires Z6:Z1 to be zero during page write #endif "ldi r16,0x05 \n\t" //Write page pointed to by Z "sts %0,r16 \n\t" "spm \n\t" #ifdef __AVR_ATmega163__ ".word 0xFFFF \n\t" "nop \n\t" "ori r30,0x7E \n\t" // recover Z6:Z1 state after page write (had to be zero during write) #endif "wait_spm5: \n\t" "lds r16,%0 \n\t" //Wait for previous spm to complete "andi r16,1 \n\t" "cpi r16,1 \n\t" "breq wait_spm5 \n\t" "ldi r16,0x11 \n\t" //Re-enable RWW section "sts %0,r16 \n\t" "spm \n\t" #ifdef __AVR_ATmega163__ ".word 0xFFFF \n\t" "nop \n\t" #endif "same_page: \n\t" "adiw r30,2 \n\t" //Next word in FLASH "sbiw r24,2 \n\t" //length-2 "breq final_write \n\t" //Finished "rjmp length_loop \n\t" "final_write: \n\t" "cpi r17,0 \n\t" "breq block_done \n\t" "adiw r24,2 \n\t" //length+2, fool above check on length after short page write "rjmp write_page \n\t" "block_done: \n\t" "clr __zero_reg__ \n\t" //restore zero register #if defined __AVR_ATmega168__ || __AVR_ATmega328P__ || __AVR_ATmega128__ || __AVR_ATmega1280__ || __AVR_ATmega1281__ || __AVR_ATmega1284P__ : "=m" (SPMCSR) : "M" (PAGE_SIZE) : "r0","r16","r17","r24","r25","r28","r29","r30","r31" #else : "=m" (SPMCR) : "M" (PAGE_SIZE) : "r0","r16","r17","r24","r25","r28","r29","r30","r31" #endif ); /* Should really add a wait for RWW section to be enabled, don't actually need it since we never */ /* exit the bootloader without a power cycle anyhow */ } putch(0x14); putch(0x10); } else { if (++error_count == MAX_ERROR_COUNT) app_start(); } } /* Read memory block mode, length is big endian. */ else if(ch=='t') { length.byte[1] = getch(); length.byte[0] = getch(); #if defined(__AVR_ATmega128__) || defined(__AVR_ATmega1280__) || defined(__AVR_ATmega1284P__) if (address.word>0x7FFF) flags.rampz = 1; // No go with m256, FIXME else flags.rampz = 0; #endif address.word = address.word << 1; // address * 2 -> byte location if (getch() == 'E') flags.eeprom = 1; else flags.eeprom = 0; if (getch() == ' ') // Command terminator { putch(0x14); for (w=0; w < length.word; w++) // Can handle odd and even lengths okay { if (flags.eeprom) // Byte access EEPROM read { #if defined(__AVR_ATmega168__) || defined(__AVR_ATmega328P__) while(EECR & (1<= 'a') { return (a - 'a' + 0x0a); } else if(a >= '0') { return(a - '0'); } return a; } char gethex(void) { return (gethexnib() << 4) + gethexnib(); } void puthex(char ch) { char ah; ah = ch >> 4; if(ah >= 0x0a) { ah = ah - 0x0a + 'a'; } else { ah += '0'; } ch &= 0x0f; if(ch >= 0x0a) { ch = ch - 0x0a + 'a'; } else { ch += '0'; } putch(ah); putch(ch); } void putch(char ch) { #if defined(__AVR_ATmega128__) || defined(__AVR_ATmega1280__) || defined(__AVR_ATmega1284P__) if(bootuart == 1) { while (!(UCSR0A & _BV(UDRE0))); UDR0 = ch; } else if (bootuart == 2) { while (!(UCSR1A & _BV(UDRE1))); UDR1 = ch; } #elif defined(__AVR_ATmega168__) || defined(__AVR_ATmega328P__) while (!(UCSR0A & _BV(UDRE0))); UDR0 = ch; #else /* m8,16,32,169,8515,8535,163 */ while (!(UCSRA & _BV(UDRE))); UDR = ch; #endif } char getch(void) { #if defined(__AVR_ATmega128__) || defined(__AVR_ATmega1280__) || defined(__AVR_ATmega1284P__) uint32_t count = 0; if(bootuart == 1) { while(!(UCSR0A & _BV(RXC0))) { /* 20060803 DojoCorp:: Addon coming from the previous Bootloader*/ /* HACKME:: here is a good place to count times*/ count++; if (count > MAX_TIME_COUNT) app_start(); } return UDR0; } else if(bootuart == 2) { while(!(UCSR1A & _BV(RXC1))) { /* 20060803 DojoCorp:: Addon coming from the previous Bootloader*/ /* HACKME:: here is a good place to count times*/ count++; if (count > MAX_TIME_COUNT) app_start(); } return UDR1; } return 0; #elif defined(__AVR_ATmega168__) || defined(__AVR_ATmega328P__) uint32_t count = 0; while(!(UCSR0A & _BV(RXC0))) { /* 20060803 DojoCorp:: Addon coming from the previous Bootloader*/ /* HACKME:: here is a good place to count times*/ count++; if (count > MAX_TIME_COUNT) app_start(); } return UDR0; #else /* m8,16,32,169,8515,8535,163 */ uint32_t count = 0; while(!(UCSRA & _BV(RXC))) { /* 20060803 DojoCorp:: Addon coming from the previous Bootloader*/ /* HACKME:: here is a good place to count times*/ count++; if (count > MAX_TIME_COUNT) app_start(); } return UDR; #endif } void getNch(uint8_t count) { while(count--) { #if defined(__AVR_ATmega128__) || defined(__AVR_ATmega1280__) || defined(__AVR_ATmega1284P__) if(bootuart == 1) { while(!(UCSR0A & _BV(RXC0))); UDR0; } else if(bootuart == 2) { while(!(UCSR1A & _BV(RXC1))); UDR1; } #elif defined(__AVR_ATmega168__) || defined(__AVR_ATmega328P__) getch(); #else /* m8,16,32,169,8515,8535,163 */ /* 20060803 DojoCorp:: Addon coming from the previous Bootloader*/ //while(!(UCSRA & _BV(RXC))); //UDR; getch(); // need to handle time out #endif } } void byte_response(uint8_t val) { if (getch() == ' ') { putch(0x14); putch(val); putch(0x10); } else { if (++error_count == MAX_ERROR_COUNT) app_start(); } } void nothing_response(void) { if (getch() == ' ') { putch(0x14); putch(0x10); } else { if (++error_count == MAX_ERROR_COUNT) app_start(); } } void flash_led(uint8_t count) { while (count--) { LED_PORT |= _BV(LED); _delay_ms(100); LED_PORT &= ~_BV(LED); _delay_ms(100); } } /* end of file ATmegaBOOT.c */ mighty-1284p-1/bootloaders/standard/Makefile000066400000000000000000000023531237102241100210420ustar00rootroot00000000000000# Makefile for ATmegaBOOT # E.Lins, 18.7.2005 # $Id$ # program name should not be changed... PROGRAM = ATmegaBOOT_1284P # enter the target CPU frequency AVR_FREQ = 16000000L MCU_TARGET = atmega1284p LDSECTION = --section-start=.text=0x1F800 OBJ = $(PROGRAM).o OPTIMIZE = -Os DEFS = -DWATCHDOG_MODS -DBAUD_RATE=57600 LIBS = CC = avr-gcc # Override is only needed by avr-lib build system. override CFLAGS = -Wall $(OPTIMIZE) -mmcu=$(MCU_TARGET) -DF_CPU=$(AVR_FREQ) $(DEFS) override LDFLAGS = -Wl,$(LDSECTION) #override LDFLAGS = -Wl,-Map,$(PROGRAM).map,$(LDSECTION) OBJCOPY = avr-objcopy OBJDUMP = avr-objdump all: CFLAGS += '-DMAX_TIME_COUNT=16000000L>>1' -DADABOOT all: $(PROGRAM).hex $(PROGRAM).hex: $(PROGRAM).elf $(OBJCOPY) -j .text -j .data -O ihex $< $@ $(PROGRAM).elf: $(OBJ) $(CC) $(CFLAGS) $(LDFLAGS) -o $@ $^ $(LIBS) $(OBJ): ATmegaBOOT.c avr-gcc $(CFLAGS) $(LDFLAGS) -c -Wall -mmcu=$(MCU_TARGET) ATmegaBOOT.c -o $(PROGRAM).o %.lst: %.elf $(OBJDUMP) -h -S $< > $@ %.srec: %.elf $(OBJCOPY) -j .text -j .data -O srec $< $@ %.bin: %.elf $(OBJCOPY) -j .text -j .data -O binary $< $@ clean: rm -rf *.o *.elf *.lst *.map *.sym *.lss *.eep *.srec *.bin *.hex mighty-1284p-1/variants/000077500000000000000000000000001237102241100151115ustar00rootroot00000000000000mighty-1284p-1/variants/standard/000077500000000000000000000000001237102241100167115ustar00rootroot00000000000000mighty-1284p-1/variants/standard/pins_arduino.h000066400000000000000000000114451237102241100215610ustar00rootroot00000000000000#ifndef Pins_Arduino_h #define Pins_Arduino_h #include // ATMEL ATMEGA1284P // // +---\/---+ // (D 0) PB0 1| |40 PA0 (AI 0 / D24) // (D 1) PB1 2| |39 PA1 (AI 1 / D25) // INT2 (D 2) PB2 3| |38 PA2 (AI 2 / D26) // PWM (D 3) PB3 4| |37 PA3 (AI 3 / D27) // PWM/SS (D 4) PB4 5| |36 PA4 (AI 4 / D28) // MOSI (D 5) PB5 6| |35 PA5 (AI 5 / D29) // PWM/MISO (D 6) PB6 7| |34 PA6 (AI 6 / D30) // PWM/SCK (D 7) PB7 8| |33 PA7 (AI 7 / D31) // RST 9| |32 AREF // VCC 10| |31 GND // GND 11| |30 AVCC // XTAL2 12| |29 PC7 (D 23) // XTAL1 13| |28 PC6 (D 22) // RX0 (D 8) PD0 14| |27 PC5 (D 21) TDI // TX0 (D 9) PD1 15| |26 PC4 (D 20) TDO // RX1/INT0 (D 10) PD2 16| |25 PC3 (D 19) TMS // TX1/INT1 (D 11) PD3 17| |24 PC2 (D 18) TCK // PWM (D 12) PD4 18| |23 PC1 (D 17) SDA // PWM (D 13) PD5 19| |22 PC0 (D 16) SCL // PWM (D 14) PD6 20| |21 PD7 (D 15) PWM // +--------+ // /* PCINT15-8: D7-0 : bit 1 PCINT31-24: D15-8 : bit 3 PCINT23-16: D23-16 : bit 2 PCINT7-0: D31-24 : bit 0 */ #define NUM_DIGITAL_PINS 32 #define NUM_ANALOG_INPUTS 8 #define analogInputToDigitalPin(p) ((p < NUM_ANALOG_INPUTS) ? (p) + 24 : -1) #define digitalPinHasPWM(p) ((p) == 3 || (p) == 4 || (p) == 6 || (p) == 7 || (p) == 12 || (p) == 13 || (p) == 14 || (p) == 15) static const uint8_t SS = 4; static const uint8_t MOSI = 5; static const uint8_t MISO = 6; static const uint8_t SCK = 7; static const uint8_t SDA = 17; static const uint8_t SCL = 16; static const uint8_t LED = 7; static const uint8_t A0 = 24; static const uint8_t A1 = 25; static const uint8_t A2 = 26; static const uint8_t A3 = 27; static const uint8_t A4 = 28; static const uint8_t A5 = 29; static const uint8_t A6 = 30; static const uint8_t A7 = 31; #define digitalPinToPCICR(p) (((p) >= 0 && (p) < NUM_DIGITAL_PINS) ? (&PCICR) : ((uint8_t *)0)) #define digitalPinToPCICRbit(p) (((p) <= 7) ? 1 : (((p) <= 15) ? 3 : (((p) <= 23) ? 2 : 0))) #define digitalPinToPCMSK(p) (((p) <= 7) ? (&PCMSK2) : (((p) <= 13) ? (&PCMSK0) : (((p) <= 21) ? (&PCMSK1) : ((uint8_t *)0)))) #define digitalPinToPCMSKbit(p) ((p) % 8) #ifdef ARDUINO_MAIN #define PA 1 #define PB 2 #define PC 3 #define PD 4 // these arrays map port names (e.g. port B) to the // appropriate addresses for various functions (e.g. reading // and writing) const uint16_t PROGMEM port_to_mode_PGM[] = { NOT_A_PORT, (uint16_t) &DDRA, (uint16_t) &DDRB, (uint16_t) &DDRC, (uint16_t) &DDRD, }; const uint16_t PROGMEM port_to_output_PGM[] = { NOT_A_PORT, (uint16_t) &PORTA, (uint16_t) &PORTB, (uint16_t) &PORTC, (uint16_t) &PORTD, }; const uint16_t PROGMEM port_to_input_PGM[] = { NOT_A_PORT, (uint16_t) &PINA, (uint16_t) &PINB, (uint16_t) &PINC, (uint16_t) &PIND, }; const uint8_t PROGMEM digital_pin_to_port_PGM[] = { PB, /* 0 */ PB, PB, PB, PB, PB, PB, PB, PD, /* 8 */ PD, PD, PD, PD, PD, PD, PD, PC, /* 16 */ PC, PC, PC, PC, PC, PC, PC, PA, /* 24 */ PA, PA, PA, PA, PA, PA, PA /* 31 */ }; const uint8_t PROGMEM digital_pin_to_bit_mask_PGM[] = { _BV(0), /* 0, port B */ _BV(1), _BV(2), _BV(3), _BV(4), _BV(5), _BV(6), _BV(7), _BV(0), /* 8, port D */ _BV(1), _BV(2), _BV(3), _BV(4), _BV(5), _BV(6), _BV(7), _BV(0), /* 16, port C */ _BV(1), _BV(2), _BV(3), _BV(4), _BV(5), _BV(6), _BV(7), _BV(0), /* 24, port A */ _BV(1), _BV(2), _BV(3), _BV(4), _BV(5), _BV(6), _BV(7) }; const uint8_t PROGMEM digital_pin_to_timer_PGM[] = { NOT_ON_TIMER, /* 0 - PB0 */ NOT_ON_TIMER, /* 1 - PB1 */ NOT_ON_TIMER, /* 2 - PB2 */ TIMER0A, /* 3 - PB3 */ TIMER0B, /* 4 - PB4 */ NOT_ON_TIMER, /* 5 - PB5 */ TIMER3A, /* 6 - PB6 */ TIMER3B, /* 7 - PB7 */ NOT_ON_TIMER, /* 8 - PD0 */ NOT_ON_TIMER, /* 9 - PD1 */ NOT_ON_TIMER, /* 10 - PD2 */ NOT_ON_TIMER, /* 11 - PD3 */ TIMER1B, /* 12 - PD4 */ TIMER1A, /* 13 - PD5 */ TIMER2B, /* 14 - PD6 */ TIMER2A, /* 15 - PD7 */ NOT_ON_TIMER, /* 16 - PC0 */ NOT_ON_TIMER, /* 17 - PC1 */ NOT_ON_TIMER, /* 18 - PC2 */ NOT_ON_TIMER, /* 19 - PC3 */ NOT_ON_TIMER, /* 20 - PC4 */ NOT_ON_TIMER, /* 21 - PC5 */ NOT_ON_TIMER, /* 22 - PC6 */ NOT_ON_TIMER, /* 23 - PC7 */ NOT_ON_TIMER, /* 24 - PA0 */ NOT_ON_TIMER, /* 25 - PA1 */ NOT_ON_TIMER, /* 26 - PA2 */ NOT_ON_TIMER, /* 27 - PA3 */ NOT_ON_TIMER, /* 28 - PA4 */ NOT_ON_TIMER, /* 29 - PA5 */ NOT_ON_TIMER, /* 30 - PA6 */ NOT_ON_TIMER /* 31 - PA7 */ }; #endif // ARDUINO_MAIN #endif // Pins_Arduino_h // vim:ai:cin:sts=2 sw=2 ft=cpp